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Transformation of ADA Programs Into Silicon PDF

68 Pages·2013·3.2 MB·English
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Table of Contents Summary 2 Background 8 Motivation 10 1 Implementation of the DoD Internet Protocol IP 14 1.1 Major Design Decisions for the specification of IP 14 1.2 IP Development and Testing Plan 17 1.3 Plan 18 1.3.1 Level I 18 1.3.2 Level II 18 1.3.3 Level III 19 1.3.4 Level IV 19 1.3.5 Level V 19 1.4 Schedule 20 2 Identifying Ada program structure candidates for transformation into 21 silicon 2.1 Ada program graphs viewed as ensembles of "engines" 23 2.2 Mapping Ada program units to SFAs 26 2.3 Top-level system structuring rules for SFAs 27 2.4 Roles of Ada packages 28 2.5 Roles of Ada tasks 29 3 The Speed-Independent Control-Unit Design System 32 3.1 SICU Features 33 3.2 Simulator 34 3.3 The Compiler 35 3.4 Circuit structures 37 3.5 Contrast with related work 37 3.6 Future work 39 4 Automating the Synthesis of VLSI Implementations from High Level 40 Specifications 4.1 A Software Environment for Experimenting with Ada-to-Silicon 40 Transformations 4.2 Transforming Ada Programs into State Machine Descriptions: Two 42 Case Studies 4.3 Transformational Implementation Strategy For Phase I 43 4.3.1 Choosing Storage Elements 43 4.3.2 Circuit Generation 44 4.4 Example I: A Simple Sort Machine 45 4.5 Unoptimised Synthesis 46 4.5.1 Choosing Data Representations Accession ,o 46 4.5.2 Modal description [RcceSso FoRA 48 riT[C TAB 5 U).anno'm*csd 0 /copy. Dimtriutlon/ . AV,&i~nbtltY Codes N~p~rLJ 11 P vall %d/or special '4.6 A Theoretical Basis For The Synthesis of Special Purpose VLSI t~1 SysteMs 5 The VLSI Research Program at Utah 53 6 References 60 List of Figures Figure 1: Internet Module decomposition. 15 Figure 2: Ada program graph divided into two subensembles by minimal 25 sharing out. One subensemble executes on a conventional General Purpose Host; the other is directly realized in circuitry as a Special Function Architecture. The cut can also be regarded as a hardware bus. Figure 3: SICUDL Program for a Simple Control-Unit 34 Figure 4: Sample Screen Image During Functional Simulation 35 Figure 5: PPL Representation of Compiled Control-Unit in Figure 3 36 Figure 6: VLSI Research Program at the University of Utah 54 ii Summary This report summarizes the first six months work of the research project, "Transformation of Ada Programs into Silicon." Our project has five main objectives: I. Develop and document elements of a transformation methodology for converting Ada programs, or program constructs, into VLSI systems which are ensembles of intercommunicating state machines. This research includes: selecting intermediate languages, as deemed necessary, and identifying a sufficient set of transformation rules for mapping program specifications through successive levels of representation, from Ada to integrated circuits. 2. Demonstrate the methodology developed in 1 by manually applying it to a non-trivial example: transforming an Ada-encoded representation of the DoD Standard Internet Protocol (or a significant subset thereof) into NMOS circuitry. 3. Work toward a theory for identifying substructures within Ada programs for which the transformation methodology is attractive or suitable, according to pragmatic considerations. (That is, attempt to determine the advantages and disadvantages of converting prototypical Ada constructs into silicon.) Identify and classify those Ada program constructs that are especially "good" candidates for conversion. 4. Develop specifications for a set of software tools for use in automating the transformation methodology developed in 1. 5. Develop a methodology for testing integrate circuits representing Ada program units and for integrating such circuits into a larger system embodying the remainder of the Ada program of which the produced integrated circuit was extracted. Thus far, work has been pursued in four main areas: 1. Converting the DoD Internet Protocol to silicon. This is the project's principal case study. Section 2 provides an overview 2 of our work thus far in this area. We sumarize here the key points to be found in that section: - Major design decisions: 1. The first is to split the INM into three submodules: an INM OUT dealing with traffic outbound on a given local net, an INN IN similarly handling inbound traffic, and an INM SRV tying them together and interfacing to the Host(s). We- envision one INM_IN and INMOUT pair for each local net interface, but only one INM SRV per INM. 2. A systematic control paradigm has been developed for use at each submodule interface. This paradigm involves a two-phase Ada rendezvous, whereby the initiator of each data transfer performs an entry call on the corresponding receiver task. When the data transferred has been fully processed, a reciprocal rendezvous takes place to report the success or failure of that processing. - Development and testing plan: A five-level software development and testing plan has been constructed, with the levels corresponding to IP applications in increasingly generalized settings. The plan stipulates testing as each level is reached, rather than as an epilog to the development plan. - Schedule: This section concludes with some Year One and Year Two goals for the completion of IP case study software and hardware development. Our strategy is for software development to "lead" hardware development by one or more levels, so that confidence is increased on the finality of designs as they are committed to hardware. 2. Identifying Ada program structure candidates for transformation to silicon. These concepts and conclusions, reported in more detail in Section 3, are summarized as follows: - Ada programming methodology not only implies a system software design methodology, but also can imply a hardware implementation methodology, and can serve as a guide for design automation. 3l i - Languages like Ada, which offer data abstraction and concurrent tasks, form their own base for a design methodology. A small set of high-level, Ada-specified structuring rules, using Ada packages and tasks as building blocks, appears necessary for "steering" the transformation from a subensemble of an Ada program graph toward custom circuit equivalents. - Ada-like programs provide a natural model-building paradigm which is: ensembles of (state machine, data path) pairs. Use of such engines can lead to reasonably high degrees of concurrency in many cases. This "high-level concurrency" is augmented with "low-level concurrency" achieved within the circuits of individual engines. - A Special Function Architecture derived from an Ada program unit is always interchangeable with a compiled image of the original Ada code. That is, an SFA can be replaced by compiled machine code loaded onto a general-purpose interpreter. - An SFA is therefore testable as a program unit, since both are expected to have the same semantics. - Ada no doubt has limitations as a design vehicle, but seems appropriate for many applications. It is too early to tell whether and how Ada should be enriched for use over the entire spectrum of the transformation process. It is too early to tell precisely for what problem domain Ada is best suited as the starting specification language. It is even too early to tell if Ada programs, for many useful applications, are, as many suspect, over-specified. Section 5 of this report expands on these issues. - Experience transforming non-toy examples from Ada to silicon, such as Utah's DoD-IP to NMOS project, should answer a number of our questions on the applicability of this methodology. Section 2 illustrates the application of our design philosophy and methodology to this important case study. - Advances in transformation system techniques and tools appear to hold the key to the feasibility of fully or partially automating the conversion from HOL program units to VLSI circuits. The gaps in our transformation systems are closing at Utah, and elsewhere. The SICU design system reported by Carter in Section 4 demonstrates well the powerful use of LISP as a basis for some of the important transformations needed in mapping to silicon from higher levels of abstraction. We believe significant progress has already been made, and though it may appear to be only a start, more significant 4 progress is expected soon. 3. VLSI Research at Utah VLSI research at the University of Utah is being pursued actively in five areas. These are: (1) The ADA to Silicon Complier, (2) Path Programmable Logic (PPL). (3) Self Timed System Architecture, (4) Device Modelling, and (5) Switched Capacitor Filter Design. Section 5 provides a more complete overview of on-going research in areas 2, 3, 4, and 5, and describes the research interactions occurring in VLSI design at Utah. All five of the major programs complement each other and help to establish a practical and viable VLSI program of broad scope. The Ada to Silicon Compiler effort is the principal interface with the research described elsewhere in this report. The objective of the PPL research is the development of structured logic for the design of VLSI using extensive computer aids. The self-timed system architecture program involves the development of procedures and VLSI implementations of asynchronously operating systems. (See also Section 3 which provides an introduction to the Speed-Independent Control-Unit (SICU) design system now in an advanced state of implementation.) The device modelling is a research program for measurement and verification of device parameters for computer modelling of integrated circuits. The object of the switched capacitor filter work is the development of a family of structured analog modules which use the PPL methodology for 5J

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converting Ada programs, or program constructs, into VLSI systems which are ensembles .. algorithms into silicon-- can be achieved, then task force leaders with P.A.Subrahmanyam aided by Sanjay Rajopadhye in this effort.
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