Page 408 Third International Symposium on Space Terahertz Technology SUB MICRON AREA Nb/AlO /Nb TUNNEL JUNCTIONS FOR SUBMM MIXER x APPLICATIONS H.G. LeDuc, B. Bumble, S.R. Cypher, A.J. Judas* andJA. Stem Centteerr foorr Sppaaccee Miccrrooeeleeccrtroonncicss M Q o f> ty ry Jet Propulsion Laboratory H *7 O "" Jg 7 • 6 1 California Institute of Technology Pasadena, CA 91109 *Present Address: Stanford University Palo Alto, CA Abstract In this paper, we report on a fabrication process developed for submicron area tunnel junctions. We have fabricated Nb/AlO /Nb tunnel junctions with areas down to 0.1 /im^ x using these techniques. The devices have shown excellent performance in receiver systems up to 500 GHz and are currently in use in radio astronomy observatories at 115, 230, and 500 GHz. The junctions are fabricated using a variant of the self-aligned-liftoff trilayer process^ with modifications for electron beam lithographic patterning of junction areas. In brief, the technique involves patterning submicron holes in PMMA using electron beam lithography. The negative of this pattern is formed by thermal deposition and liftoff of chromium metal using this PMMA stencil. The chromium pattern is transferred to an underlying polyimide film using oxygen RIE. Junctions are formed by RIE using a gas mixture containing CC12F2 and electrically isolated with thermally evaporated silicon monoxide. Contact wiring and coupling/tuning structures are patterned by RIE. Introduction SIS tunnel junctions can be modeled as a nonlinear resistor in parallel with a shunt capacitor. A good figure-of-merit of the high frequency performance of these devices is Third International Symposium on Space Terahertz Technology p o 409 a e the ratio of the capacitive reactance to the real resistance (coRC). The RC product, for SIS tunnel junctions, is determined by the tunnel barrier thickness and is independent of the device area. The junction area is chosen to provide the best impedance match to the mixer embedding circuit and is usually a compromise between minimizing the capacitance while maintaining a reasonable real impedance. In the best case, the embedding circuit can tune out the capacitance and the junction area is chosen to make the rf-resistance match the real part of the embedding circuit impedance (approximately 50 - 100 &). For small RC devices, the resistance-area product is small so that achieving the appropriate resistance using a single junction requires submicron areas. Series arrays or other novel coupling mechanisms may relieve the constraint on submicron areas, however, designing these elements may require a greater understanding of the high frequency characteristics of devices and materials than is currently available. We have chosen to use single junctions hi the hope that the simplicity in understanding the high frequencies behavior of the mixers may outweigh the complexity associated with the fabrication of submicron devices. Since their development2, high quality Nb/AlOx/Nb tunnel junctions represent the only all refractory SIS technology in use in radio astronomy receiver systems. This is primarily due to their nearly ideal tunneling characteristics and physical robustness. In this paper we describe techniques for fabricating submicron devices. Tunnel Junction Fabrication The tunnel junction fabrication process is similar to the self-aligned-liftoff process used to fabricate refractory tunnel junctions employing optical lithography1'3. The primary difference arises from the need to use higher resolution lithography in the tunnel junction patterning and to maintain this resolution throughout the fabrication process. The process steps are shown schematically in figure 1. Page 410 Third International Symposium on Space Terahertz Technology Chromium Chromium Polyimlde Nb Insulator Nb .I.1'1's,l'1AWJ(M^lA\1^ IIIHIllTIlllTlllITlTIIlIrT W/f IllTIHIIlrrtllTIT.IlnlTII Figure 1. Submicron fabrication process schematic, (a) After trilayer deposition , wafers are spin coated with 400-600 nm of potyimide and 120 nm PMMA. (b) Chromium metal is thermally deposited, (c) Oxygen RJE of polyimide. (d) RIE of Nb counter electrode in CQ2F2+CF4+O2 gas mixture, (e) Deposition of SiO, lift-off, and wire electrode deposition and patterning. a. Nb/AJO /Nb Trilayer Deposition x The Nb/AlO /Nb trilayer is deposited in-situ in a high vacuum system (base pressure 1.3 x x 10 ~7 Pa) by magnetron sputtering. The substrates are oxidized silicon or quartz and are heat sunk to a thermal mass but not actively cooled during deposition. The large scale features of the trilayer are formed by lift-off using AZ5214 photoresist (AZ Hoechst) and image reversal. The Nb base and counter electrodes are approximately 160 nm and 120 nm respectively. The barrier is formed by depositing 6-10 nm of aluminum followed by an in-situ oxidation in an argon/oxygen gas mixture in a manner similar to that described by Morohashi et alA During this step the total process gas pressure is maintained constant by throttling the vacuum pump. A de-plasma is formed during the oxidation process by applying approximately -500V to an aluminum ring placed in the system. This plasma has Third International Symposium on Space Terahertz Technology Page 411 been found to reduce oxidation times, but does not effect the quality of the barrier. After the Nb counter electrode deposition, 30 nm of gold is deposited on the trilayer to act as a contact layer. b. Junction Patterning The etch mask used to form the tunnel junction is patterned by electron beam (e-beam) lithography using a JEOL JBX-5 lithography system with a minimum spot size of 8 nm. The lithographic stencil must be robust enough to withstand Reactive Ion Etching (RIE) and provide a means to subsequently lift-off the SiO isolation layer. The high resolution e- beam resist, PMMA, is not suitable as the final RIE mask because it lacks the required etch resistance. Techniques have been developed which transfer the e-beam written pattern into polyimide while maintaining the required resolution4. The wafer is spin coated with a polyimide5 film approximately 400 - 600 nm thick. Following a hot plate bake to drive the solvents from the polyimide, the wafer is spin coated with 120 nm of PMMA. It is then exposed in the e-beam lithography system to form holes in the PMMA film with the required junction dimensions. Chromium metal is thermally evaporated onto this stencil and the PMMA is removed in acetone, leaving metal where there were holes (polyimide is not soluble in acetone). The resulting pattern is etched in a parallel plate RIE system using oxygen gas to remove polyimide from areas of the wafer not protected by chromium. The RIE of polyimide is highly anisotropic, however, it is sensitive to surface contamination such as dust or material resputtered from the electrodes of the etcher and care must be taken to provide a clean environment for this process step. An SEM micrograph of an etch test pattern is shown in figure 2. The square etch stencils consisting of Cr(30nm) on Polyimide(550nm) have dimensions of 1.5, 1.0, 0.5, and 0.25 urn on a side. The minimum area is . Page 412 Third International Symposium on Space Terahertz Technology Figure 2. Test patterns etched in polyimide using oxygen RIE The smallest features are 0.06u,m2. c. Junction Etch The tunnel junction is formed using RIE by first etching the gold contact layer and then the Nb counter electrode. The gold is sputter etched using argon gas. Techniques for anisotropically etching Nb had to be developed. An etch profile for a submicron line patterned in an Nb film using a standard etch process (CF4+20% C>2 ,4 Pa pressure, and 0.27 W/cm^ power density ) is shown in figure 3. The isotropic component of this etch mixture is clearly too large to be used in the fabrication of submicron devices. Anisotropy occurs in RIE when the etch mechanism requires predominantly normal incident ion impact energy to proceed6. Etching of Nb in CF4/O2 , however, occurs via a spontaneous rather than ion assisted reaction of fluorine and fluorine radicals with Nb. We have found a technique which achieves the required anisotropy. Etching with a gas mixture containing CC\2P2 produces very good etch anisotropy, which may be attributed to the a nonvolatile NbCl product which forms on the sidewalls. Figure 4 shows the etch rate of Nb and NbN x using mixtures of CC12F2+CF4+O2 • For these measurements, the total pressure was 4 Third International Symposium on Space Terahertz Technology Page 413 Figure 3. Submicron Nb lines etched by RIE using CF4+O2. The large undercut of the Nb line below the 0.4(im chromium etch stencil is evident. Pa, the power density was 0.27 W/cm^ and the oxygen flow was constant at 2 seem, while the CC12F2/CF4 ratio was varied. The etch is highly anisotropic for mixtures containing greater than 60% CC12F2 in CC12F2+CF4. Mixtures rich CF4 exhibited isotropic etching. The region with approximately 20% to 50% CC12F2 content was characterized by low etch rates and polymer formation. Shown in figure 5 is the etch profile of Nb achieved using 62% CC12F2 in (CC12F2+CF4) and similar sample etched in CF4+O2- Structures etched in the CC12F2 gas mixture show very little undercut while CF4+C>2 produced a large undercut. d. Electrical Isolation Following the etch the counter electrode to form the junctions, a electrical isolation layer of SiO is deposited with the etch mask in place . The SiO is thermally deposited from a baffled source. To achieve good edge coverage, the samples are placed at a fixed angle Page 414 Third International Symposium on Space Terahertz Technology Nb e- NbN 0.2 0.4 0.6 0.8 Figure 4. RIE etch rate for Mb and NbN as a function of gas composition. The etch gas consists of 85%(x CCl2F2+(l-x)CF4)+15%O2. relative to SiO flux and rotated during the deposition. Flux angles for normal incidence to approximately 60 degrees have been evaluated. Angles of 5-15 degrees have been found to provide a good compromise between side wall coverage and clean lift-off. SiO film thicknesses are typically 150-250 nanometers depending on the application. The polyimide and SiO are removed from the junction areas using dichloromethane solvent. A short RIE etch in oxygen is used to remove polyimide residues after the lift-off step. e. Contact Wiring Mixer elements are completed by depositing 250-350 nm of Nb by magnetron sputtering. The wire layer is patterned lithographically and etched using a RIE process similar to the one used for the junction etch. A typical current-voltage characteristic for a tunnel junction fabricated by this process is shown in figure 6. This device is 0.25 pjn^ in area and has a critical current density of 7.7 Third International Symposium on Space Terahertz Technology Page 415 Summary/Conclusions In this paper, we have described techniques developed for the fabrication of submicron area tunnel junctions in refractory materials. The process described is applied specifically to the fabrication of Nb/AlO /Nb tunnel junctions, however, much of the technology has x also been used to fabricate NbN/MgO/NbN tunnel junctions7 and is relevant to other submicron fabrication tasks. This process extends the self-aligned lift-off process used to fabricate refractory tunnel junctions using optical lithography. The primary new features are the use of electron beam lithography to form a submicron pattern in PMMA and the transfer of this pattern into chromium by lift-off. The chromium pattern is transferred into polyimide using oxygen RIE and the resulting Cr/polyimide is used to etch the trilayer counter electrode using a highly anisotropic RIE gas mixture containing CC12&2- Nb/AlO /Nb tunnel junctions with areas down to 0.1 [im^ have been fabricated using these x techniques. Mixer elements have been fabricated using this process for both wave guide8»9»10 and quasi optically coupled11*12'13 receiver systems. In wave guide receiver systems with operating frequencies up to 500 GHz, the capacitance associated with the submicron area Nb/AlO /Nb devices is small enough so that the mixer block rf-embedding x circuit provides enough tuning to achieve excellent performance (receiver noise temperatures, TR(DSB) = 180K at 485 GHz)14 without integrated tuning structures. In principle junction areas can be scaled down further, however, in order to do so the junction relaxation times must also be scaled down so that the real part of the junction impedance in the correct range. The junction relaxation time (RC) is determined by the insulator barrier thickness, with thinner barriers producing smaller RCs. The limit for a given insulator barrier is determined by the thinnest barrier that can be achieved while maintaining suitable junction characteristics. It has been our experience with Nb/AlO /Nb tunnel x junctions, that the I-V characteristics degrade significantly for critical current densities of Page 416 Third International Symposium on Space Terahertz Technology greater than 15kA/cm2 (RA= 12 Q jim^). For junctions with this current density, a 100 fli junction has an area of = 0.12 um^. Acknowledgements The research described in this paper was performed by the Center for Space Microelectronics Technology, Jet Propulsion Laboratory , California Institute of Technology, and was jointly sponsored by the Strategic Defense Initiative Organization / Innovative Science and Technology Office and the National Aeronautics and Space Administration / the Office of Aeronautics and Space Technology. We would also like to acknowledge P.D. Maker and R.E. Muller for the excellent electron beam lithography support and technical discussions. References: 1 A. Shoji, F. Shinoki, S. Kosaka, M. Aoyagi, and H. Hayakawa, " New Fabrication Process for Josephson Tunnel Junctions with (Nobium Nitride, Niobium) Double-Layered Electrodes", Appl. Phys. Lett., 41,1097, (1982). 2 M. Gurvitch, M.A. Washington, and H.A. Huggins, "High Quality Refractory Tunnel Junctions Utilizing Thin Aluminium Layers", Appl. Phys. Lett., 42, 472 (1983). 3 S. Morohashi, F. Shinoki, A Shoji, M. Aoyagi, and H. Hayakawa, "High Quality Nb/Al-AlOxINb Josephson Junction", Appl. Phys. Lett. 46,1179, (1985). 4 D.M. Byrne, AJ. Brouns, F.C. Case, R.C. Tiberio, B.L. Whitehead, and E.D. Wolf, "Infrared Mesh Filters Fabricated by Electron-Beam Lithography", J. Vac. Sci. Technol., B3, 268 (1985) and references within: M. Hatzakis, B.J. Canavello, and J.M. Shaw, IBM J. Res. Dev., 24, 452 (1980). 5 Olin Ciba-Geigy, Probimide 200 series. 6 See for instance: J.W. Coburn, Plasma Etching and Reactive Ion Etching. AVS Monograph Series, Ed. N. Rey Whetten. 7 J.A. Stern, H.G. LeDuc, and AJ. Judas, "Fabrication and Characterization of High Current-Density, Submicron, NbNIMgO/NbN Tunnel Junctions", this conference. 8 H.H.S. Javadi, W.R. McGrath, S.R. Cypher, B.D. Hunt, and H.G. LeDuc, Digest 15th Int. Conf. on IR and Millimeter Waves, p245, Orlando, FL (1990). 9 J.W. Kooi, M. Chan, T.G. Phillips, B. Bumble, and H.G. LeDuc, "A Low Noise 230 GHz Heterodyne Third International Symposium on Space Terahertz Technology Page 417 Receiver Employing .25'\ar? Area NblAlOjJNb Tunnel Junctions", IEEE Microwave Theory and Techniques Journal, to be published. 10 C.K. Walker, M. Chen, P.L. Shafer, H.G. LeDuc, J.E. Carlstrom, and T.G. Phillips, "A 492 GHz SIS Waveguide Receiver for Submillimeter Astronomy", Int. J. of IR and Millimeter Waves, to be published. 11 T.H. Buttgenbach, H.G. LeDuc, P.D. Maker, and T.G. Phillips, "A Fixed Tuned Broadband Matching Structure for Submillimeter SIS Receivers", IEEE Trans. Appl. Superconductivity, to be published. 12 P.A. Stimson, RJ. Dengler, P.H. Siegel, and H.G. LeDuc, "A Planar Quasi-Optical SIS Receiver for Array Applications", this conference. 13 J. Zmuidzinas, H.G. LeDuc, and J.A. Stern, "Slot Antenna SIS Mixers for Submillimeter Wavelengths", this conference. l^ Private communication, C.K. Walker.