MIXED-MODE SIMULATION AND ANALOG MULTILEVEL SIMULATION THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE VLSI, COMPUTER ARCHITECTURE AND DIGITAL SIGNAL PROCESSING Consulting Editor Jonathan Allen Other books in the series: PIPELINED ADAPTIVE DIGITAL FILTERS, Naresh R. Shanbhag, Keshab K. Parhi ISBN: 0-7923-9463-1 TIMED BOOLEAN FUNCTIONS: A Unified Formalism for Exact Timing Analysis, William K.C. Lam, Robert K. Brayton ISBN: 0-7923-9454-2 AN ANALOG VLSI SYSTEM FOR STEREOSCIPIC VISION, Misha Mahowald ISBN: 0-7923-944-5 ANALOG DEVICE-LEVEL LAYOUT AUTOMATION, John M. Cohn, David J. Garrod, Rob A. Rutenbar, L. Richard Carley ISBN: 0-7923-9431-3 VLSI DESIGN METHODOLOGIES FOR DIGITAL SIGNAL PROCESSING ARCHITECTURES, Magdy A. Bayoumi ISBN: 0-7923-9428-3 CIRCUIT SYNTHESIS WITH VHDL, Roland Airiau, Jean-Michel Berge, Vincent Olive ISBN: 0-7923-9429-1 ASYMPTOTIC WAVEFORM EVALUATION, Eli Chiprout, Michel S. Nakhla ISBN: 0-7923-9413-5 WAVE PIPELINING: THEORY AND CMOS IMPLEMENTATION, C. Thomas Gray, Wentai Liu, Ralph K. Cavin, III ISBN: 0-7923-9398-8 CONNECTIONIST SPEECH RECOGNITION: A Hybrid Appoach, H. Bourlard, N. Morgan ISBN: 0-7923-9396-1 BiCMOS TECHNOLOGY AND APPLICATIONS, SECOND EDITION, A.R. Alvarez ISBN: 0-7923-9384-8 TECHNOLOGY CAD-COMPUTER SIMULATION OF IC PROCESSES AND DEVICES, R. Dutton, Z. Yu ISBN: 0-7923-9379 VHDL '92, THE NEW FEATURES OF THE VHDL HARDWARE DESCRIPTION LANGUAGE, J. Berge, A. Fonkoua, S. Maginot, J. Rouillard ISBN: 0-7923-9356-2 APPLICATION DRIVEN SYNTHESIS, F. Catthoor, L. Svenson ISBN :0-7923-9355-4 ALGORITHMS FOR SYNTHESIS AND TESTING OF ASYNCHRONOUS CIRCUITS, L. Lavagno, A. Sangiovanni-Vincentelli ISBN: 0-7923-9364-3 HOT-CARRIER RELIABILITY OF MOS VLSI CIRCUITS, Y. Leblebici, S. Kang ISBN: 0-7923-9352-X MOTION ANALYSIS AND IMAGE SEQUENCE PROCESSING, M. I. Sezan, R. Lagendijk ISBN: 0-7923-9329-5 HIGH-LEVEL SYNTHESIS FOR REAL-TIME DIGITAL SIGNAL PROCESSING: The Cathedral-II Silicon Compiler, J. Vanhoof, K. van Rompaey, I. Boisens, G. Gossens,.H. DeMan ISBN: 0-7923-9313-9 \ MIXED-MODE SIMULATION AND ANALOG MULTILEVEL SIMULATION Resve Saleh Shyh-Jye Jon University of Illinois A. Richard Newton University of California . •, ~ SPRINGER SCIENCE+BUSINESS MEDIA, LLC Library of Congress Cataloging-in-Publication Data Saleh, Resve A., 1957- Mixed-mode simulation and analog multilevel simulation / Resve Saleh, Shyh-Jye Jou, A. Richard Newton. p. cm. -- (Kluwer international series in engineering and computer science) Includes bibliographical references and index. ISBN 978-1-4419-5144-1 ISBN 978-1-4757-5854-2 (eBook) DOI 10.1007/978-1-4757-5854-2 1. Computer simulation. 1. Jou, Shyh-Jye. II. Newton, A. Richard (Arthur Richard), 1951- . III. Title. IV. Series. QA76.9.C65S26 1944 621.3815'01'13--dc20 94-20345 CIP Copyright © 1994 by Springer Science+Business Media New York Originally published by Kluwer Academic Publishers in 1994 AU rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, mechanical, photo-copying, recording, or otherwise, without the prior written permission of the publisher, Springer Science+Business Media, LLC. Printed on acidlree pap er. TABLE OF CONTENTS PREFACE ............................................................................................ IX ACKNOWLEDGEMENTS .......... ..................................... .......... ........ Xl 1. INTRODUCTION.......................... ......................................... ......... 1 1.1 THE SIMULATION PROBLEM .......... ...................... .............. 1 1.2 LEVELS OF SIMULATION FOR DIGITAL CIRCUITS ........ 4 1.2.1 Electrical Simulation ......................................................... 6 1.2.2 Gate-Level Simulation ...................................................... 7 1.2.3 Switch-Level Simulation ................................................... 8 1.2.4 Register-Transfer Level Simulation .................. .......... ...... 9 1.2.5 Behavioral Level Simulation ........ .................................... 10 1.3 LEVELS OF SIMULATION FOR ANALOG CIRCUITS ....... 10 1.3.1 Behavioral Simulation ....................................................... 12 1.3.2 Ideal Functional Simulation ..................... ........................ 12 1.3.3 Non-Ideal Functional Simulation ...................................... 12 1.3.4 Electrical Simulation ......................................................... 13 1.4 MIXED-MODE AND ANALOG MULTILEVEL SIMULATION .......................................................................... 14 1.5 BASIC ISSUES IN MIXED-MODE SIMULATION ................ 19 1.6 A SURVEY OF EXISTING SIMULATORS ............................ 23 1.7 OUTLINE OF THE BOOK ....................................................... 25 2. ELECTRICAL SIMULATION TECHNIQUES .......... ........ ...... ..... 31 2.l EQUATION FORMULATION ................................................. 31 2.2 STANDARD TECHNIQUES FOR TRANSIENT ANALYSIS ............................................................................... 36 2.3 TIME-STEP CONTROL: THEORETICAL ISSUES ............... 41 2.3.1 Constraints on Step Size ................................................... 42 2.3.2 Solution of Nonlinear Equations ....................................... 50 2.4 TIME-STEP CONTROL: IMPLEMENTATION ISSUES ....... 52 VI CONTENTS 2.4.1 LTE Time-Step Control .................................................. .. 53 2.4.2 Iteration Count Time-Step Control .................................. . 55 3. RELAXATION-BASED SIMULATION TECHNIQUES ............ .. 57 3.1 LATENCY AND MULTIRATE BEHAVIOR ........................ .. 58 3.2 OVERVIEW OF RELAXATION METHODS ....................... .. 64 3.2.1 Linear Relaxation ............................................................. . 64 3.2.2 Nonlinear Relaxation ...................................................... .. 68 3.2.3 Waveform Relaxation ..................................................... .. 72 3.2.4 Partitioning for Relaxation Methods ................................ . 74 4. ITERATED TIMING ANALYSIS ................................................. . 77 4.1 EQUATION FLOW FOR NONLINEAR RELAXATION ..... .. 77 4.2 TIMING ANALYSIS ALGORITHMS .................................... .. 79 4.3 SPLICE!.7 -FIXED TIME-STEP ITA ................................... .. 85 4.4 CIRCUIT PARTITIONING ..................................................... .. 88 4.4.1 MNA Elements ................................................................. . 89 4.4.2 New Sufficient Condition of Convergence ..................... .. 91 4.4.3 A Partitioning Algorithm ................................................. . 93 4.5 GLOBAL-VARIABLE TIME-STEP CONTROL .................... . 103 4.6 ELECTRICAL EVENTS AND EVENT SCHEDULING ........ . 107 4.6.1 Latency Detection ...................................... ;. .................... . 107 4.6.2 Events and Event Scheduling ........................................... . 113 4.6.3 Latency in the Iteration Domain ...................................... . 118 5. GATE-LEVEL SIMULATION ...................................................... . 123 5.1 INTRODUCTION .................................................................... .. 123 5.2 EVOLUTION OF LOGIC STATES ......................................... . 125 5.2.1 Two-State Logic Model ................................................... . 125 5.2.2 Ternary Logic Model ....................................................... . 128 5.2.3 A Four-State Logic Model ............................................... . 133 5.2.4 A Nine-State Logic Model ............................................... . 135 5.3 CHARACTERIZATION OF SWITCHING PROPERTIES 136 CONTENTS vii 5.4 LOGIC SWITCHING DELAY MODELS ............................... . 144 5.5 LOGIC SIMULATION ALGORITHM .................................... . 150 6. SWITCH-LEVEL TIMING SIMULATION ................................. .. 153 6.1 INTRODUCTION ..................................................................... . 153 6.2 SWITCH-LEVEL SIMULATION ............................................ . 154 6.3 A GENERALIZATION OF THE NINE-STATE LOGIC MODEL ................................................................................... .. 157 6.4 SIMULATION USING THE GENERALIZED MODEL ........ . 162 6.4.1 Electrical-Logic Simulation ............................................ .. 162 6.4.2 The Elogic Algorithm ...................................................... . 168 6.4.3 Problems with the Elogic Approach ............................... .. 170 6.5 A SURVEY OF SWITCH-LEVEL TIMING SIMULATORS 173 7. THE MIXED-MODE INTERFACE ............................................... . 179 7.1 ANALOG TO DIGITAL INTERFACE .................................... . 179 7.2 DIGITAL TO ANALOG INTERFACE .................................... . 184 7.3 MIXED-MODE INTERFACE TEST CIRCUITS .................... . 195 8. MIXED-MODE SIMULATION AND IMPLEMENTATION 203 8.1 SIMULATOR ARCHITECTURE ............................................ . 203 8.2 EVENT SCHEDULER DESIGN .............................................. . 206 8.3 TRANSIENT ANALYSIS AND EVENT SCHEDULING 210 8.4 DC ANALYSIS TECHNIQUES .............................................. .. 213 8.5 AUTOMATIC MIXED-MODE PARTITIONING .................. .. 217 8.5.1 Program Overview ........................................................... . 218 8.5.2 Channel-Connected Transistor Groups ............................ . 218 8.5.3 Recognition of User-Defined Components ...................... . 227 8.6 MIXED-MODE SIMULATION EXAMPLE .......................... .. 229 9. ANALOG MULTILEVEL SIMULATION .................................... . 235 9.1 INTRODUCTION ..................................................................... . 235 viii CONTENTS 9.2 SIMULATION ISSUES ............................................................. 239 9.3 CONTINUOUS-TIME BEHAVIORAL MODELS ................... 241 9.3.1 Behavioral Models Using a Hardware Description Language ........................................................................... 241 9.3.2 s-Domain Models .............................................................. 242 9.3.3 Differential Equations ....................................................... 250 9.4 DISCRETE-TIME MODELS .................................................... 250 9.4.1 Behavioral AHDL Models ................................................ 251 9.4.2 Difference Equations and z-domain Models ..................... 251 9.4.3 Functional Simulation ....................................................... 253 9.5 MIXED CONTINUOUS/DISCRETE SIMULATION .............. 256 9.6 iMACSIM: A CASE STUDy.................................................... 260 9.7 SIMULATION EXAMPLES ..................................................... 262 9.8 A MACROMODELING AND SIMULATION ENVIRONMENT ..................................................................... 266 9.9 SUMMARY ............................................................................... 275 10. CONCLUSIONS AND FUTURE WORK ...... ...... .......... ...... ......... 277 10.1 SUMMARy............................................................................. 277 10.2 AREAS OF FUTURE WORK ...... .......... .......... .............. ......... 279 10.2.1 Coupling Effects in Mixed-Signal ICs .............. ............ 279 10.2.2 Analog Hardware Description Languages ........ ............ 280 10.3 CONCLUSIONS ...................................................................... 281 REFERENCES ..................................................................................... 283 INDEX ................................................................................................. 297 ABOUT THE AUTHORS ................................................................... 301 IX PREFACE Our purpose in writing this book was two-fold. First, we wanted to compile a chronology of the research in the field of mixed-mode simula tion and analog multilevel simulation over the last ten to fifteen years. A substantial amount of work was performed during this period of time but most of it was published in archival form in Masters theses and Ph.D. dissertations. Since the interest in mixed-mode simulation and analog multilevel simulation is growing, and a thorough review of the state-of the-art in the area was not readily available, we decided to publish the information in the form of a book. Secondly, we wanted to provide enough information to the reader so that a prototype mixed-mode simulator could be developed using the algo rithms in this book. The SPLICE family of mixed-mode, programs is based on the algorithms and techniques described in this book and so it can also serve as documentation for these programs. In this new edition of the book, we have added a substantial amount of information on the mixed-mode interface in Chapter 7 and automatic mixed-mode partitioning in Chapter 8. We have also improved the review of existing mixed-mode simulators so that the reader is better able to select the most appropriate one for their application. Chapter 9 is a new chapter on analog multilevel simulation. The iMACSIM program, developed at the University of Illinois, is based on the contents of this chapter, so it serves as documentation for this program. Although, there are some omissions of other relevant research work III this book, space limitations did not allow us to include everything. However, some of the other research has already been published by Kluwer Academic Publishers and others, and we wanted to avoid any duplication. xi ACKNOWLEDGEMENTS The authors dedicate this book to Prof. D. O. Pederson for inspiring this research work and for providing many years of support and encourage ment. The authors enjoyed many fruitful discussions and collaborations with Jim Kleckner, Young Kim, Alberto Sangiovanni-Vincentelli, Jacob White and Jaidip Singh, and we thank them for their contributions. Jaidip Singh, Tom Thatcher, Victor Ma, Dave Overhauser and Narendra Jain also provided useful contributions to the new version. We also thank the countless others who participated in the research work and read early ver sions of this book. Lillian Beck proofread the text and provided many suggestions to improve the manuscript. Yun-Cheng Ju did the artwork for the most of the illustrations. Mei-Hsin Wu assisted with the text and new illustrations for this edition of the book. The second version was also reviewed by Uma Ekambaram, Luis Amaya and Brian Antao. Jaidip Singh and Xiaocun Xu prepared most of the new simulation results pro vided in the book. The Semiconductor Research Corporation provided a substantial amount of funding for the body of work presented in this book. We grate fully acknowledge their continuing support for research and education in this area. Other funding and computer equipment was provided by the Natural Sciences and Engineering Research Council (NSERC) of Canada, the Hewlett-Packard Company, Toshiba Corporation, Digital Equipment Corporation, Analog Devices and Motorola Inc., and we appreciate their contributions.