EVALUATION KIT AVAILABLE MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC General Description Benefits and Features The MAX11903 is an 18-bit, 1.6Msps, single-channel, ● High DC/AC Accuracy Provides Better Measurement fully differential SAR ADC with internal reference buffers. Quality The MAX11903 provides excellent static and dynamic • 18-Bit Resolution with No Missing Codes performance with best-in-class power consumption that • ±2 LSB INL and ±0.5 LSB DNL Maximum at 18 Bits directly scales with throughput. The device has a unipolar • 98.0dB SNR and 97.8dB SINAD at fIN = 10kHz differential ±VREF input range. Supplies include a 3.3V • -123dB THD at fIN = 10kHz supply for the reference buffers, a 1.8V analog supply, ● High Sampling Rate SAR Architecture Enables Fast a 1.8V digital supply, and a 1.5V to 3.6V digital interface Settling and Acquisition supply. • 1.6Msps Throughput with No Pipeline Delay This ADC achieves 98dB SNR and -123dB THD, guaran- ● Integration Simplifies Design tees 18-bit resolution with no-missing codes and 2 LSB • Integrated Reference Buffers, VREF = 2.5V to 3.6V INL (max). • ±VREF Unipolar Differential Analog Input Range The MAX11903 communicates data using a SPI- ● Scalable Ultra-Low Power Supply Reduces Power compatible serial interface. The MAX11903 is offered in a Consumption 20-pin, 4mm x 4mm, TQFN package and is specified over • 9mW at 1.6Msps the -40°C to +85°C operating temperature range. ● Flexible Low-Voltage Supplies Save Cost • 1.8V Analog and Digital Core Supply Applications • 1.5V to 3.6V Digital Interface Supply ● Test and Measurement • 3.3V REFVDD Reference Buffer Supply ● Automatic Test Equipment ● Flexible, Industry-Standard Serial Interface and Small ● Medical Instrumentation Package Reduce Size ● Process Control and Industrial Automation • SPI-/QSPI™-/MICROWIRE®/DSP-Compatible ● Data Acquisition Systems • 20-Pin, 4mm x 4mm, TQFN Package ● Telecommunications ● Battery-Powered Equipment QSPI is a trademark of Motorola, Inc. MICROWIRE is a registered trademark of National Semiconductor Corporation. Application Diagram Ordering Information and Selector Guide appears at end of data sheet. 1.5 TO 3.3V 3.6V 1.8V 1.8V 3.6V 16-Bit to 20-Bit SAR ADC Family 7.5Ω REFVDDAVDDDVDDOVDD REFIN 0 TO 3.3V AIN+ DIN 16-BIT 18-BIT 20-BIT C1OnGF MAX11903 DSOCULKT SI4N-PWTIEIRREFACE 1.6Msps MAX11901 MAX11903 MAX11905 7.5Ω AIN- CNVST 1Msps MAX11900 MAX11902 MAX11904 3.3V TO 0V REFREFGNDAGNDDGND 3.3V 10µF For related parts and recommended products to use with this part, refer to www.maximintegrated.com/MAX11903.related. 19-7410; Rev 2; 4/15 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC TABLE OF CONTENTS General Description............................................................................ 1 Applications .................................................................................. 1 Features and Benefits .......................................................................... 1 Application Diagram............................................................................ 1 16-Bit to 20-Bit SAR ADC Family ................................................................. 1 Absolute Maximum Ratings...................................................................... 4 Package Thermal Characteristics ................................................................. 4 Electrical Characteristics ........................................................................ 4 Typical Operating Characteristics ................................................................. 8 Pin Configuration ............................................................................. 12 Pin Description............................................................................... 12 Functional Diagram ........................................................................... 13 Detailed Description........................................................................... 14 Analog Inputs ..............................................................................14 Input Settling...............................................................................16 Input Filtering ..............................................................................16 Voltage Reference Configurations ..............................................................17 Transfer Function ...........................................................................17 Digital Interface .............................................................................. 19 SPI Timing Diagram .........................................................................20 Register Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Register Read..............................................................................22 Register Map ................................................................................ 23 Mode Register..............................................................................23 Conversion Result Register ...................................................................24 Chip ID Register ............................................................................24 Typical Application Circuit ...................................................................... 24 Single-Ended Unipolar Input to Differential Unipolar Output ..........................................24 Single-Ended Bipolar Input to Differential Unipolar Output ...........................................24 Layout, Grounding, and Bypassing ............................................................... 24 Definitions................................................................................... 27 Integral Nonlinearity.......................................................................27 Differential Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Offset Error .............................................................................27 Gain Error...............................................................................27 Signal-to-Noise Ratio......................................................................27 Signal-to-Noise Plus Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 www.maximintegrated.com Maxim Integrated │ 2 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC TABLE OF CONTENTS (continued) Effective Number of Bits ...................................................................27 Total Harmonic Distortion ..................................................................27 Spurious-Free Dynamic Range..............................................................27 Aperture Delay...........................................................................27 Aperture Jitter ...........................................................................27 Selector Guide............................................................................... 28 Ordering Information .......................................................................... 28 Chip Information.............................................................................. 28 Package Information .......................................................................... 28 Revision History.............................................................................. 29 LIST OF FIGURES Figure 1. Signal Ranges........................................................................ 14 Figure 2. Simplified Model of Input Sampling Circuit.................................................. 15 Figure 3. Conversion Frame, SAR Conversion, Track and Read Operation................................ 15 Figure 4. Ideal Transfer Characteristic ............................................................ 18 Figure 5. Read During Track Phase............................................................... 19 Figure 6. Read During SAR Conversion Phase...................................................... 19 Figure 7. Split Read Mode ...................................................................... 20 Figure 8. SPI Interface Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 9. DIN Timing for Register Write Operations .................................................. 21 Figure 10. Timing Diagram for Data Out Reading After Conversion...................................... 21 Figure 11. Mode Register Write .................................................................. 22 Figure 12. Register Read....................................................................... 22 Figure 13. Unipolar Single-Ended Input............................................................ 25 Figure 14. Bipolar Single-Ended Input............................................................. 25 Figure 15. Top Layer Sample Layout.............................................................. 26 LIST OF TABLES Table 1. ADC Driver Amplifier Recommendation..................................................... 16 Table 2. Voltage Reference Configurations......................................................... 17 Table 3. MAX11903 External Reference Recommendations............................................ 17 Table 4. Transfer Characteristic.................................................................. 18 Table 5. DOUT Driver Strength .................................................................. 23 www.maximintegrated.com Maxim Integrated │ 3 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Absolute Maximum Ratings REFVDD, REF, REFIN, OVDD to GND ..................-0.3V to +4V Continuous Power Dissipation (TA = +70°C) AVDD, DVDD to GND .............................................-0.3V to +2V TQFN (derate 30.30mW/°C above +70°C).............2424.2mW DGND to AGND, REFGND ..................................-0.3V to +0.3V Operating Temperature Range ...........................-40°C to +85°C AIN+, AIN- to GND ......-0.3V to the lower of (VREF + 0.3V) and Junction Temperature ......................................................+150°C +4V or ±130mA Storage Temperature Range ............................-65°C to +150°C SCLK, DIN, DOUT, CNVST, to GND ...........-0.3V to the lower of Lead Temperature (soldering, 10s) .................................+300°C (VOVDD + 0.3V) and +4V Soldering Temperature (reflow) .......................................+260°C Maximum Current into Any Pin...........................................50mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) TQFN Junction-to-Ambient Thermal Resistance (θJA).... ......33°C/W Junction-to-Case Thermal Resistance (θJC) ....... ........ 2°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG INPUT Input Voltage Range (Note 3) (AIN+) - (AIN-) -VREF +VREF V Absolute Input Voltage Range AIN+, AIN- relative to AGND -0.1 VREF + V 0.1 Common-Mode Input Range [(AIN+) + (AIN-)]/2 VR0E.F1/2 - VREF/2 V+R E0F.1/2 V Input Leakage Current Acquisition phase -1 0.001 +1 µA Input Capacitance 32 pF STATIC PERFORMANCE (Note 4) Resolution N 18 Bits Resolution LSB VREF = 3.3V 25.2 µV No Missing Codes 18 Bits Offset Error (Note 4) -4 ±1 +4 LSB Offset Temperature Coefficient ±0.004 LSB/°C Gain Error Referred to REFIN reference input -50 ±5 +50 LSB Gain Error Temperature Referred to REFIN reference input ±0.05 LSB/°C Coefficient (Note 5) Gain Error Referred to REF pins -12 ±4 +12 LSB Gain Error Temperature Referred to REF pins ±0.04 LSB/°C Coefficient (Note 5) Integral Nonlinearity INL -2 ±0.5 +2 LSB www.maximintegrated.com Maxim Integrated │ 4 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Differential Nonlinearity DNL -0.5 ±0.25 +0.5 LSB (Note 6) Analog Input CMR CMR DC 5 LSB/V Power-Supply Rejection PSR PSR vs. AVDD 0.6 LSB/V (Note 7) Power-Supply Rejection PSR PSR vs. REFVDD 1 LSB/V (Note 7) Transition Noise 1.2 LSBRMS EXTERNAL REFERENCE REF Voltage Input Range VREF 2.5 3.3 3.6 V Load Current IREF 1.6Msps, VREF = 3.3V 600 µA REF Input Capacitance 1 nF REFERENCE BUFFER REFIN Input Voltage Range VREFIN VREF < (VREFVDD - 200mV) 2.5 3 VR2E0F0VmDVD - V REFIN Input Current IREFIN 1 nA Turn-On Settling Time CEXT = 10µF on REF pin, 20 ms CREFIN = 0.1µF on REFIN pin External Compensation Capacitor CEXT REF pins 4.7 10 µF DYNAMIC PERFORMANCE (Note 8) Dynamic Range Internal RefBuffer, -60dBFS input 98.7 dB Signal-to-Noise Ratio SNR Internal RefBuffer, fIN = 10kHz 96.8 98.0 dB Signal-to-Noise Plus Distortion SINAD Internal RefBuffer, fIN = 10kHz, 96.7 97.9 dB -0.1dBFs Spurious-Free Dynamic Range SFDR Internal RefBuffer, fIN = 10kHz 125 dB Total Harmonic Distortion THD Internal RefBuffer, fIN = 10kHz -123 dB Total Harmonic Distortion THD Internal RefBuffer, fIN = 100kHz -115 dB Total Harmonic Distortion THD Internal RefBuffer, fIN = 250kHz -107 dB SAMPLING DYNAMICS Throughput 0 1.6 Msps -3dB point (targeting 20MHz) 20 Full-Power Bandwidth MHz -0.1dB point 3 Acquisition Time tACQ 100 ns Time delay from CNVST rising edge Aperture Delay to time at which sample is taken for 1 ns conversion Aperture Jitter 3 psRMS www.maximintegrated.com Maxim Integrated │ 5 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Analog Supply Voltage AVDD 1.7 1.8 1.9 V Digital Supply Voltage DVDD 1.7 1.8 1.9 V Reference Buffer Supply REFVDD 2.7 3.3 3.6 V Voltage Interface Supply Voltage OVDD 1.5 3.6 V Analog Supply Current IAVDD VAVDD = 1.8V 2 2.5 mA Digital Supply Current IDVDD VDVDD = 1.8V 2.2 2.7 mA RCeufrererenntce Buffer Supply IREFVDD VenRaEbFlVedDD = 3.6V, internal buffers 3.3 3.55 mA RCeufrererenntce Buffer Supply IREFVDD VpoRwEeFrVeDdD d =o w3n.6V, internal buffers 0.26 mA Interface Supply Current VOVDD = 1.5V 0.35 (Note 9) IOVDD VOVDD = 3.6V 1 mA Shutdown Current For AVDD, DVDD, REFVDD 1 µA Shutdown Current For DVDD 1 µA VAVDD = 1.8V, VDVDD = 1.8V, Power Dissipation VREFVDD = 3.3V, internal reference 8.4 10.2 mW buffers disabled DIGITAL INPUTS (DIN, SCLK, CNVST) 0.7 x Input Voltage High VIH VOVDD = 1.5V to 3.6V VOVDD V 0.3 x Input Voltage Low VIL VOVDD = 1.5V to 3.6V VOVDD V Input Capacitance CIN 10 pF Input Current IIN VIN = 0V or VOVDD 1 µA DIGITAL OUTPUTS (DOUT) Output Voltage High VOH ISOURCE = 2mA VO0V.D4D - V Output Voltage Low VOL ISINK = 2mA 0.4 V www.maximintegrated.com Maxim Integrated │ 6 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Electrical Characteristics (continued) (fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING DIN to SCLK Rising Edge Setup t1 4 ns DIN to SCLK Rising Edge Hold t2 1 ns DOUT End-Of-Conversion Low Time t3 10 ns DOUT to SCLK Rising Edge Hold t4 2.5 ns DOUT to SCLK Rising Edge Setup t5 100MHz SCLK 1.5 ns SCLK High t6 4.5 ns SCLK Period t7 10 ns SCLK Low t8 4.5 ns CNVST Rising Edge To SCLK Rising Edge t9 0 ns SCLK Rising Edge to CNVST Rising Edge t10 25 ns CNVST High t11 20 ns CNVST High to EOC t12 525 ns Conversion Period t13 625 ns Note 2: Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and device characterization. Note 3: See the Analog Inputs section. Note 4: See the Definitions section at the end of the data sheet. Note 5: See the Definitions section at the end of the data sheet. Error contribution from the external reference not included. Note 6: Parameter is guaranteed by design. Note 7: Defined as the change in positive full-scale code transition caused by a ±5% variation in the supply voltage. Note 8: Sine wave input, fIN = 10kHz, AIN = -0.5dB below full scale. Note 9: CLOAD = 10pF on DOUT. fCONV = 1.6Msps. All data is read out. www.maximintegrated.com Maxim Integrated │ 7 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) toc1 INL vs. TEMPERATURE DNL vs. TEMPERATURE 1.0 toc3 0.5 toc4 MAX DNL (LSB) MAX INL (LSB) 0.8 MIN DNL (LSB) MIN INL (LSB) 0.5 0.3 B) NL (LSB)0.0 DNL (LS 0.0 I -0.3 -0.5 -0.8 -0.5 -1.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (oC) TEMPERATURE (oC) INL vs. AVDD SUPPLY VOLTAGE DNL vs. AVDD SUPPLY VOLTAGE 1.0 toc5 0.5 toc6 0.8 MMAINX I NINLL ( (LLSSBB)) VVRREEFFV=D D3=.3 V3.6V 0.4 MMAINX D DNNLL ( (LLSSBB)) VVRREEFFV=D D3=.3 3V.6V 0.3 0.5 0.2 0.3 INL (LSB)-00..03 DNL (LSB)-000...011 -0.2 -0.5 -0.3 -0.8 -0.4 -1.0 -0.5 1.70 1.73 1.75 1.78 1.80 1.83 1.85 1.88 1.90 1.70 1.73 1.75 1.78 1.80 1.83 1.85 1.88 1.90 VAVDD(V) VAVDD(V) www.maximintegrated.com Maxim Integrated │ 8 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (continued) (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) INL vs. VREFVDDSUPPLY VOLTAGE DNL vs. VREFVDDSUPPLY VOLTAGE 3.0 toc7 0.5 toc8 MAX INL (LSB) VAVDD= 1.8V 0.4 MAX DNL (LSB) VAVDD= 1.8V 2.0 MIN INL (LSB) VREF= 2.5V 0.3 MIN DNL (LSB) VREF= 2.5V 0.2 1.0 B) NL (LSB) 0.0 DNL (LS 00..01 I -0.1 -1.0 -0.2 -0.3 -2.0 -0.4 -3.0 -0.5 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VREFVDD(V) VREFVDD(V) OFFSET AND GAIN ERROR vs. TEMPERATURE OFFSET ERROR vs. AVDD SUPPLY VOLTAGE 4 toc9 0.25 toc10 OGFAFINS EETR R(LOSRB )(LSB) VVRREEFFV=DD3=.3 V3.6V 0.15 VVRREEFFV=D D3=.3 V3.6V 2 B) S ERROR (LSB) 0 SET ERROR (L -00..0055 F F O -2 -0.15 -4 -0.25 -40 -25 -10 5 20 35 50 65 80 95 110 125 1.7 1.75 1.8 1.85 1.9 TEMPERATURE (°C) VAVDD (V) OFFSET ERROR vs. REFVDD VOLTAGE OUTPUT NOISE HISTOGRAM toc12 0.5 toc11 40000 VREF= 2.5V STDEV = 1.1 LSB VAVDD= 1.8V 0.0 ES 30000 C B) EN S R T ERROR (L-0.5 OF OCCUR 20000 OFFSE-1.0 UMBER 10000 N 0 -1.52.7 2.8 2.9 3 V3R.E1FVDD (V3).2 3.3 3.4 3.5 3.6 131035 131036 131037 131038 131039 131040 131041 131042 131043 OUTPUT CODE (DECIMAL) www.maximintegrated.com Maxim Integrated │ 9 MAX11903 18-Bit, 1.6Msps, Low-Power, Fully Differential SAR ADC Typical Operating Characteristics (continued) (VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.8V, VREFVDD = 3.6V, fSAMPLE = 1.6Msps, VREF = 3.3V, Internal Ref Buffer On, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) SNR AND SINAD vs. TEMPERATURE SFDR AND THD vs. TEMPERATURE 100 toc15 135 toc16 -THD SNR 133 SFDR SINAD 99 131 B) B) 129 D (d 98 D (d 127 A H SIN D T 125 SNR AND 97 SFDR AN 112213 96 119 117 95 115 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) SNR AND SINAD vs. REFERENCE VOLTAGE THD AND SFDR vs. REFERENCE VOLTAGE 100.0 toc17 130 toc18 SINAD SFDR SNR 128 -THD 99.0 125 ND SINAD (dB) 9978..00 R AND THD (dB) 112203 NR A 96.0 SFD 118 S 115 95.0 113 94.0 110 2 2.3 2.6 2.9 3.2 3.5 2.0 2.2 2.3 2.5 2.6 2.8 2.9 3.1 3.2 VREF(V) VREF (V) www.maximintegrated.com Maxim Integrated │ 10