TLV320ADC3101-Q1 www.ti.com SLAS816B–MARCH2012–REVISEDAUGUST2012 Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets and Portable Audio CheckforSamples:TLV320ADC3101-Q1 FEATURES • Digital MicrophoneInputSupport 1 • Qualifiedfor AutomotiveApplications • TwoGPIOs 2 • AEC-Q100TestGuidanceWiththeFollowing • PowerSupplies: Results: – Analog: 2.6V–3.6V – DeviceTemperatureGrade2:–40°C to – Digital:Core: 1.65V–1.95V, +105°CAmbientOperatingTemperature I/O: 1.1V–3.6V Range • 4-mm× 4-mm 24-PinRGE(QFN) – DeviceHBMESDClassificationLevelH1C APPLICATIONS – DeviceCDMESDClassificationLevelC3B • Stereo AudioADC • WirelessHandsets – 92-dBASignal-to-NoiseRatio • PortableLow-Power AudioSystems – SupportsADCSampleRatesFrom8kHzto • Noise-CancellationSystems 96kHz • Front-EndVoiceorAudioProcessorforDigital • Instruction-ProgrammableEmbeddedminiDSP Audio • FlexibleDigitalFilteringWithRAM DESCRIPTION ProgrammableCoefficient,Instructions,and Built-InProcessingBlocks The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting – Low-LatencyIIRFiltersforVoice sampling rates from 8 kHz to 96 kHz with an – LinearPhaseFIR FiltersforAudio integrated programmable-gain amplifier providing up – Additional ProgrammableIIRFiltersforEQ, to 40-dB analog gain or AGC. A programmable NoiseCancellationorReduction miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or – Upto128ProgrammableADCDigital Filter off, is also provided. The inputs are programmable in Coefficients a combination of single-ended or fully differential • SixAudioInputsWithConfigurableAutomatic configurations. Extensive register-based power GainControl(AGC) control is available via an I2C interface, enabling – ProgrammableinSingle-Ended or Fully mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery- DifferentialConfigurations poweredportableequipment. – CanBe3-Statedfor EasyInteroperability WithOtherAudioICs The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A • LowPowerConsumptionand Extensive programmable noise-gate function is included to ModularPower Control: avoidnoisepumping.Low-latencyIIRfiltersoptimized – 6-mWMonoRecord,8-kHz for voice and telephony are available, as well as – 11-mWStereoRecord,8-kHz linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may – 10-mWMonoRecord,48-kHz be used for sound equalization, or to remove noise – 17-mWStereoRecord,48-kHz components. The audio serial bus can be • DualProgrammableMicrophoneBias programmed to support I2S, left-justified, right- justified, DSP, PCM, and TDM modes. The audio bus • ProgrammablePLLforClockGeneration maybeoperatedineithermasterorslavemode. • I2C™ControlBus • AudioSerialDataBusSupportsI2S,Left/Right- Justified,DSP,PCM,and TDMModes 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. I2CisatrademarkofPhillipsElectronics. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2012,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters. TLV320ADC3101-Q1 SLAS816B–MARCH2012–REVISEDAUGUST2012 www.ti.com DESCRIPTION (CONTINUED) A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular casesof12-MHz,13-MHz,16-MHz,19.2-MHz, and19.68-MHzsystemclocks. Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. SIMPLIFIED BLOCK DIAGRAM 1 0 R R D D DOUT BCLK WCLK 2C_A 2C_A I I SDA e 2ISTDMSerialBusnterfac Serialol Bus SCL I Cntr 2ICo RESET Png DMCLK/GPOI1O2 DigitalMicrophoneInterface DDIINNRL mini DSProcessiBlocks Audio ClockGenerationPLL MCLK PI 2 DIN/G MicBias MICBIAS2 M C C D D D A A 1 Micas MICBIAS1 Bi B B AGC PGA0 to 40d0.5-dBSteps AGC PGA0 to 40d0.5-dBSteps DVSS Bias/nce IOVDD AnalogSignal InputSwitchingandAttenuation Current Refere DAAVVVSDDSDD P) P) M) M) P) M) IN1L( IN2L( IN3L( IN1R( IN2R( IN3R( Figure1. TLV320ADC3101-Q1BlockDiagram 2 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 www.ti.com SLAS816B–MARCH2012–REVISEDAUGUST2012 Table1. ORDERINGINFORMATION ORDERABLEP/N T PACKAGE TOPSIDESYMBOL A 6PADC3101TRGERQ1 –40°Cto105°C VQFN(24)-RGE Reelof3000 ADC|3101Q PIN ASSIGNMENTS TLV320ADC3101-Q1 RGEPACKAGE (TOPVIEW) O2 O1 PI PI G G D K/ N/ CLK VSS VDD OD MCL MDI M D D V D D I 4 3 2 1 0 9 2 2 2 2 2 1 BCLK 1 18 SDA WCLK 2 17 SCL DOUT 3 16 I2C_ADR1 RESET 4 15 I2C_ADR0 MICBIAS1 5 14 MICBIAS2 IN3L(M) 6 13 IN3R(M) 7 8 9 10 11 12 L(P) L(P) VSS VDD R(M) R(P) N2 N1 A A N1 N2 I I I I ConnecttheQFNthermalpadtoAVSS. PINFUNCTIONS PIN NAME NUMBER DESCRIPTION AVDD 10 Analogvoltagesupply,2.6V–3.6V AVSS 9 Analoggroundsupply,0V BCLK 1 Audioserialdatabusbitclock(input/output) Digitalmicrophoneclock/general-purposeinput/output#2(input/output)/PLLclockinput DMCLK/GPIO2 20 /audioserialdata-busbit-clockinput/output/multifunctionpinbasedonregister programming Digitalmicrophonedatainput/general-purposeinput/output#1(input/output)/PLLclock DMDIN/GPIO1 19 muxoutput/AGCnoiseflag/multifunctionpinbasedonregisterprogramming DOUT 3 Audioserialdatabusdataoutput(output) DVDD 22 Digitalcorevoltagesupply,1.65V–1.95V DVSS 23 Digitalgroundsupply,0V I2C_ADR0 15 LSBofI2Cbusaddress I2C_ADR1 16 LSB+1ofI2Cbusaddress IN1L(P) 8 Micorlineanaloginput(left-channelsingle-endedordifferentialplus,orrightchannel) IN1R(M) 11 Micorlineanaloginput(left-channelsingle-endedordifferentialminus,orleftchannel) Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 SLAS816B–MARCH2012–REVISEDAUGUST2012 www.ti.com PINFUNCTIONS(continued) PIN NAME NUMBER DESCRIPTION IN2L(P) 7 Micorlineanaloginput(left-channelsingle-endedordifferentialplus) IN2R(P) 12 Micorlineanaloginput(right-channelsingle-endedordifferentialplus) IN3L(M) 6 Micorlineanaloginput(left-channelsingle-endedordifferentialminus) IN3R(M) 13 Micorlineanaloginput(right-channelsingle-endedordifferentialminus) IOVDD 21 I/Ovoltagesupply,1.1V–3.6V MCLK 24 Masterclockinput MICBIAS1 5 MICBIAS1biasvoltageoutput MICBIAS2 14 MICBIAS2biasvoltageoutput RESET 4 Reset SCL 17 I2Cserialclock SDA 18 I2Cserialdatainput/output WCLK 2 Audioserialdatabuswordclock(input/output) ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) VALUE UNIT AVDDtoAVSS –0.3to3.9 V IOVDDtoDVSS –0.3to3.9 V DVDDtoDVSS –0.3to2.5 V DigitalinputvoltagetoDVSS –0.3VtoIOVDD+0.3 V AnaloginputvoltagetoAVSS –0.3VtoAVDD+0.3 V Operatingtemperaturerange –40to105 °C T Storagetemperaturerange –65to125 °C stg T Max Junctiontemperature 125 °C J Powerdissipation (T Max–T )/θ W J A JA θ Thermalimpedance,QFNpackage 45 °C/W JA Electrostatic HumanBodyModel(HBM)AEC-Q100ClassificationLevelH1C 1.5 kV Discharge ChargedDeviceModel(CDM)AEC-Q100ClassificationLevelC3B 750 V (ESD) protection (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. DISSIPATION RATINGS(1) PACKAGETYPE T =25°C DERATING T =75°C T =85°C T =105°C A A A A FACTOR QFN 2.22W 22.2mW/°C 665mW 444mW 4mW (1) Thisdatawastakenusing2oz.(0.071-mmthick)traceandcopperpadthatissoldereddirectlytoaJEDECstandard4-layer3-in.×3- in.(7.62-cm×7.62-cm)PCB. 4 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 www.ti.com SLAS816B–MARCH2012–REVISEDAUGUST2012 RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT AVDD(1) Analogsupplyvoltage 2.6 3.3 3.6 V DVDD(1) Digitalcoresupplyvoltage 1.65 1.8 1.95 V IOVDD(1) DigitalI/Osupplyvoltage 1.1 1.8 3.6 V V Analogfull-scale0-dBinputvoltage(AVDD=3.3V) 0.707 Vrms I Digitaloutputloadcapacitance 10 pF T Operatingfree-airtemperature –40 105 °C A (1) AnalogvoltagevaluesarewithrespecttoAVSS;digitalvoltagevaluesarewithrespecttoDVSS. ELECTRICAL CHARACTERISTICS T =–40°Cto105°C,AVDD=3.3V,IOVDD=1.8V,DVDD=1.8V,f =48-kHz,16-bitaudiodata(unlessotherwisenoted) A S PARAMETER TESTCONDITIONS MIN TYP MAX UNIT AUDIOADC Inputsignallevel(0-dB) Single-endedinput 0.707 Vrms Inputcommon-modevoltage Single-endedinput 1.35 Vrms Signal-to-noiseratio, f =48kHz,0-dBPGAgain,IN1inputsselected SNR S 80 92 dB A-weighted(1) (2) andac-shortedtoground Dynamicrange, f =48kHz,1-kHz–60-dBfull-scaleinput A-weighted(1) (2) aSppliedatIN1inputs,0-dBPGAgain 92 dB f =48kHz,1-kHz–2-dBfull-scaleinputapplied –110 –72 dB THD Totalharmonicdistortion S atIN1inputs,0-dBPGAgain 0.003% 0.017% 234Hz,100mV onAVDD,single-endedinput 46 PP PSRR Powersupplyrejectionratio dB 234Hz,100mV onAVDD,differentialinput 68 PP ADCchannelseparation 1kHz,–2dBIN1LtoIN1R –73 dB ADCgainerror 1kHzinput,0-dBPGAgain 0.7 dB ADCprogrammable-gain 1-kHzinputtone,R <50Ω 40 dB amplifiermaximumgain SOURCE ADCprogrammable-gain 0.502 dB amplifierstepsize IN1inputs,routedtosingleADC 35 Inputmixattenuation=0dB Inputresistance IN2inputs,inputmixattenuation=0dB 35 kΩ IN1inputs,inputmixattenuation=–6dB 62.5 IN2inputs,inputmixattenuation=–6dB 62.5 Inputcapacitance 10 pF Inputlevelcontrolminimum 0 dB attenuationsetting Inputlevelcontrolmaximum 6 dB attenuationsetting Inputlevelcontrolattenuation 6 dB stepsize (1) Ratioofoutputlevelwith1-kHzfull-scalesine-waveinput,totheoutputlevelwiththeinputsshort-circuited,measuredA-weightedovera 20-Hzto20-kHzbandwidthusinganaudioanalyzer. (2) Allperformancemeasurementsdonewith20-kHzlow-passfilterand,wherenoted,A-weightedfilter.Failuretousesuchafiltermay resultinhigherTHDandlowerSNRanddynamicrangereadingsthanshownintheElectricalCharacteristics.Thelow-passfilter removesout-of-bandnoise,which,althoughnotaudible,mayaffectdynamicspecificationvalues. Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 SLAS816B–MARCH2012–REVISEDAUGUST2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) T =–40°Cto105°C,AVDD=3.3V,IOVDD=1.8V,DVDD=1.8V,f =48-kHz,16-bitaudiodata(unlessotherwisenoted) A S PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ADCDIGITALDECIMATIONFILTER f =48kHz S Filtergainfrom0to0.39f FilterA,AOSR=128or64 ±0.1 dB S Filtergainfrom0.55f to64f FilterA,AOSR=128or64 –73 dB S S Filtergroupdelay FilterA,AOSR=128or64 17/f s S Filtergainfrom0to0.39f FilterB,AOSR=64 ±0.1 dB S Filtergainfrom0.60f to32f FilterB,AOSR=64 –46 dB S S Filtergroupdelay FilterB,AOSR=64 11/f s S Filtergainfrom0to0.39f FilterC,AOSR=32 ±0.033 dB S Filtergainfrom0.28f to16f FilterC,AOSR=32 –60 dB S S Filtergroupdelay FilterC,AOSR=32 11/f s S MICROPHONEBIAS 2 2.25 2.5 2.75 Biasvoltage Programmablesettings,load=750Ω V AVDD– 0.2 Currentsourcing 2.5-Vsetting 4 mA BW=20Hzto20kHz,A-weighted,1-μF μV Integratednoise 3.3 capacitorbetweenMICBIASandAGND rms DIGITALI/O 0.3× V Inputlowlevel I =5μA –0.3 V IL IL IOVDD V Inputhighlevel(3) I =5μA 0.7× V IH IH IOVDD 0.1× V Outputlowlevel I =2TTLloads V OL IH IOVDD 0.8× V Outputhighlevel I =2TTLloads V OH OH IOVDD SUPPLYCURRENT f =48-kHz,AVDD=3.3V,DVDD=IOVDD=1.8V S AVDD 2 Monorecord PLLandAGCoff mA DVDD 1.9 AVDD 4 Stereorecord PLLandAGCoff mA DVDD 2.1 AVDD Additionalpowerconsumedwhen 1.1 PLL mA DVDD PLLispowered 0.8 AVDD Allsupplyvoltagesapplied,allblocks 0.04 μA Powerdown DVDD programmedinlowestpowerstate 0.7 DVDD T =–40°Cto105°C 10 μA A (3) WhenIOVDD<1.6V,minimumV is1.1V. IH 6 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 www.ti.com SLAS816B–MARCH2012–REVISEDAUGUST2012 AUDIO DATA SERIAL INTERFACE TIMING DIAGRAMS Allspecificationsat25°C,DVDD=1.8V WCLK t (WS) d t t r f BCLK t (DO-WS) t (DO-BCLK) d d DOUT IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX t (WS) BCLK/WCLKdelaytime 20 15 ns d t (DO-WS) BCLK/WCLKtoDOUTdelaytime 25 20 ns d t (DO-BCLK) BCLKtoDOUTdelaytime 20 15 ns d t Risetime 20 15 ns r t Falltime 20 15 ns f NOTE: Alltimingspecificationsaremeasuredatcharacterization. Figure2. I2S/LJF/RJFTiminginMasterMode Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 SLAS816B–MARCH2012–REVISEDAUGUST2012 www.ti.com Allspecificationsat25°C,DVDD=1.8V WCLK t (WS) t (WS) d d t t f r BCLK t (DO-BCLK) d DOUT IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX t (WS) BCLK/WCLKdelaytime 25 15 ns d t (DO-BCLK) BCLKtoDOUTdelaytime 25 15 ns d t Risetime 20 15 ns r t Falltime 20 15 ns f NOTE: Alltimingspecificationsaremeasuredatcharacterization. Figure3. DSPTiminginMasterMode 8 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 www.ti.com SLAS816B–MARCH2012–REVISEDAUGUST2012 Allspecificationsat25°C,DVDD=1.8V WCLK t (WS) S t (WS) h t (BCLK) H t t r f BCLK t (BCLK) t (DO-WS) L d t (DO-BCLK) d DOUT IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX t (BCLK) BCLKhighperiod 35 35 ns H t (BCLK) BCLKlowperiod 35 35 ns L t(WS) BCLK/WCLKsetuptime 10 6 ns s t (WS) BCLK/WCLKholdtime 10 6 ns h t (DO-WS) BCLK/WCLKtoDOUTdelaytime(forLJFModeonly) 30 30 ns d t (DO-BCLK) BCLKtoDOUTdelaytime 25 20 ns d t Risetime 16 8 ns r t Falltime 16 8 ns f NOTE: Alltimingspecificationsaremeasuredatcharacterization. Figure4. I2S/LJF/RJFTiminginSlaveMode Copyright©2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TLV320ADC3101-Q1 TLV320ADC3101-Q1 SLAS816B–MARCH2012–REVISEDAUGUST2012 www.ti.com Allspecificationsat25°C,DVDD=1.8V (see NOTE) WCLK th(WS) ts(WS) th(WS) t (WS) h BCLK t (BCLK) tL(BCLK) H td(DO-BCLK) tf tr DOUT NoteA.FallingedgeinsideaframeforWCLKisarbitraryinsideframe. IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX t (BCLK) BCLKhighperiod 35 35 ns H t (BCLK) BCLKlowperiod 35 35 ns L t(WS) BCLK/WCLKsetuptime 10 8 ns s t (WS) BCLK/WCLKholdtime 10 8 ns h t (DO-BCLK) BCLKtoDOUTdelaytime 25 20 ns d t Risetime 15 8 ns r t Falltime 15 8 ns f NOTE: Alltimingspecificationsaremeasuredatcharacterization. Figure5. DSPTiminginSlaveMode spacer spacer spacer TYPICAL CHARACTERISTICS 0 -20 -40 -60 B d -80 -100 -120 -140 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Frequency - kHz Figure6.LineInputtoADCFFTPlot 10 SubmitDocumentationFeedback Copyright©2012,TexasInstrumentsIncorporated ProductFolderLinks:TLV320ADC3101-Q1