WWrriigghhtt SSttaattee UUnniivveerrssiittyy CCOORREE SScchhoollaarr Browse all Theses and Dissertations Theses and Dissertations 2006 IImmpplleemmeennttaattiioonn ooff aa MMuullttii--LLaayyeerreedd FFuuzzzzyy CCoonnttrroolllleerr oonn aann FFPPGGAA Ajit Paal Singh Khatra Wright State University Follow this and additional works at: https://corescholar.libraries.wright.edu/etd_all Part of the Electrical and Computer Engineering Commons RReeppoossiittoorryy CCiittaattiioonn Khatra, Ajit Paal Singh, "Implementation of a Multi-Layered Fuzzy Controller on an FPGA" (2006). Browse all Theses and Dissertations. 35. https://corescholar.libraries.wright.edu/etd_all/35 This Thesis is brought to you for free and open access by the Theses and Dissertations at CORE Scholar. It has been accepted for inclusion in Browse all Theses and Dissertations by an authorized administrator of CORE Scholar. For more information, please contact [email protected]. IMPLEMENTATION OF A MULTI-LAYERED FUZZY CONTROLLER ON AN FPGA A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Engineering By Ajit P Khatra B.Tech., Punjab Technical University, 2002 2006 Wright State University WRIGHT STATE UNIVERSITY SCHOOL OF GRADUATE STUDIES July 3, 2006 I HEREBY RECOMMEND THAT THE THESIS PREPARED UNDER MY SUPERVISION BY Ajit P Khatra ENTITLED Implementation of a Multi-Layered Fuzzy Controller on an FPGA BE ACCEPTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF Master of Science in Engineering. _________________________________ Kuldip S. Rattan, Ph.D. Thesis Director ________________________________ Fred D. Garber, Ph.D. Department Chair Committee on Final Examination __________________________________ Kuldip S. Rattan, Ph.D. __________________________________ John M. Emmert, Ph.D. __________________________________ Pradeep Misra, Ph.D. __________________________________ Joseph F. Thomas, Jr., Ph.D. Dean, School of Graduate Studies ABSTRACT Khatra, Ajit Paal Singh. M.S. Egr., Department of Electrical Engineering, Wright State University, 2006. Implementation of a Multi-layered Fuzzy Controller on an FPGA. The uses of Autonomous Mobile robots range from the teleoperated Sojourner on the Mars Pathfinder mission to cleaning robots in the Paris Metro. They have overtaken tasks which are too difficult or dangerous to perform or require the repetition of the same procedure over and over again and can become dull for a human to perform. The objective of this thesis is to develop and implement a multilayered fuzzy controller on an FPGA for the navigational control of an autonomous mobile robot (AMR). The navigational algorithm assists the robot in navigating through complex environments of passages and hallways. The FPGA implementation of the navigational algorithm employs a layered fuzzy control strategy where a control model is developed using three elementary layers of control: Centering Layer, Wall Hugging Layer, and Obstacle Avoidance Layer. The centering layer is used to control the robot motion through a passage with both walls within the range of robot side sensors. In such a scenario, this layer directs the robot to the center of the passage. If the side sensors for the robot detect wall only on one side, wall hugging layer is activated and the robot moves parallel to the side wall. These two layers are developed using a proportional-plus-derivative fuzzy controller and share the fuzzy sets and the rule base. The obstacle avoidance layer prevents the collision of the robot with objects and is activated if the front sensor detects an obstacle within a preset distance. The advantages of FPGA implementation over a microcontroller implementation include faster processing power, compact design and elimination of inter-module communication on different platforms results in improved response of the robot in dynamically changing environment. iii TABLE OF CONTENTS 1. INTRODUCTION 1 1.1. BACKGROUND 3 1.2. PROBLEM DESCRIPTION 4 1.3. OUTLINE OF THESIS 7 2. INTRODUCTION TO FUZZY LOGIC 8 2.1. BASIC ELEMENTS OF FUZZY LOGIC 10 2.1.1. FUZZY SETS 10 2.1.2. FUZZY SET TERMINOLOGY 12 2.1.3. FUZZY SET OPERATORS 13 2.1.4. FUZZY PARTITIONING 16 2.1.5. LINGUISTIC VARIABLES 17 2.1.6. FUZZY CONTROL RULES 18 2.2. FUZZY LOGIC CONTROLLER 19 2.2.1. FUZZIFICATION 20 2.2.2. INFERENCE EVALUATION 21 2.2.3. DEFUZZIFICATION 23 2.3. SUMMARY 24 iv 3. HARDWARE DESCRIPTION 25 3.1. SENSOR MODULE 26 3.2. MOTOR DRIVER MODULE 30 3.3. SUPERVISOR MODULE 34 3.3.1. FIELD PROGRAMMABLE GATE ARRAY 35 3.3.1.1.CONFIGURABLE LOGIC BLOCK 37 3.3.1.2.PROGRAMMABLE INPUT/OUTPUT BLOCK 38 3.3.1.3.PROGRAMMABLE INTERCONNECT 39 3.3.2. VIRTEX-II PRO LC DEVELOPMENT BOARD 40 3.4. INTERFACE CIRCUITS 43 3.4.1. 5V TO 3.3V CONVERTER 43 3.4.2. 3.3V TO 5V CONVERTER 45 3.5. SUMMARY 47 4. NAVIGATIONAL CONTROL ALGORITHM 48 4.1. CENTERING LAYER 50 4.1.1. INPUT FUZZY SETS 51 4.1.2. RULE BASE 53 4.1.3. OUTPUT FUZZY SETS 54 v 4.2. WALL HUGGING LAYER 56 4.2.1. RULE BASE 57 4.3. OBSTACLE AVOIDANCE LAYER 59 4.4. SUMMARY 60 5. FPGA MODULES 61 5.1. SENSOR MODULE 62 5.2. MOTOR DRIVER MODULE 69 5.3. SUPERVISOR MODULE 71 5.4. SUMMARY 76 6. RESULTS 77 7. APPENDIX 80 8. BIBLIOGRAPHY 149 vi LIST OF FIGURES Figure 2.1 Comparison between Conventional Set and Fuzzy Set………….………………11 Figure 2.2 Complement of a Fuzzy Set. ……………………………………………………… 13 Figure 2.3 Union of two Fuzzy Sets………………………………….………………………... 14 Figure 2.4 Intersection of Fuzzy Sets A and B. …………………….…………………………15 Figure 2.5 Fuzzy Partitioning of space U………………………….………………………… 16 Figure 2.6 Example of Linguistic Variables. ……………………..….……………………… 17 Figure 2.7 Block Diagram of a Fuzzy Logic Controller. ………...….…………………….. 19 Figure 2.8 Example of Fuzzification. ……………………………….…………………………20 Figure 2.9 Min-Max Method of inference to produce fuzzy sets……………………………22 Figure 3.1 Ultrasonic Sensor SRF04…………………………………………………………. 26 Figure 3.2 Timing Diagram of Ultrasonic Sensor. …………………...……………………28 Figure 3.3 Pin-out for SRF04 sensor………………………………………..………………. 29 Figure 3.4 3.5” Sullivan Wheels fitted with encoder disc………………...………………. 31 Figure 3.5 Hamamatsu P5587 infrared photo-reflector sensor……………..……………. 32 Figure 3.6 R1 robot platforms…………………………………………………...……………. 33 Figure 3.7 Block diagram representation of the overall robot system. ……………………35 Figure 3.8 Architecture of FPGA. ……………………………………………………………36 Figure 3.9 Architecture of CLB………………………………………………..……………. 37 Figure 3.10 Input/Output Block (IOB) ……………………………………….……………. 38 Figure 3.11 Virtex-II Pro LC Development Kit……………………………….……………. 41 Figure 3.12 Block diagram of a Virtex-II Pro LC development kit………………………. 42 vii Figure 3.13 MOC3010 schematic………………………………………………………..……. 44 Figure 3.14 Connection diagram for 5V to 3.3V converter…………………………..……. 45 Figure 3.15 2N3904 as an inverter……………………………………………………………. 46 Figure 3.16 3.3V to 5V converter circuit……………………………………………………. 46 Figure 4.1 Schematic of Layered Motion Control System for robot navigation….……. 49 Figure 4.2 Fuzzy sets for error input………………………………………………………... 51 Figure 4.3 Fuzzy sets for the Rate of Change of Error input……………………….……. 52 Figure 4.4 Output fuzzy sets for centering mode……………………………………..……. 55 Figure 5.1 A ‘TRANSCIEVER’ Block…………………………………………………………. 62 Figure 5.2 Timing for a ‘TRANSCIEVER’ block……………………………………………. 63 Figure 5.3 ‘TRIGGER’ block ………………………………………………………………..…64 Figure 5.4 ‘LATCH’ block…………………………………………………………………….. 65 Figure 5.5 Interconnection of all the blocks…………………………….……………………66 Figure 5.6 ‘RESET’ block…………………………………………………..…………………. 67 Figure 5.7 Block diagram of the Sensor Module……………………………………………. 68 Figure 5.8 Block diagram for motor diver module…………………………………………. 69 Figure 5.9 Block diagram of the supervisor module…………………….…………………. 71 Figure 5.10 Interface block for the LCD screen…………………………..………………….72 Figure 5.11 Block diagram showing the interconnection of various modules……..……. 74 Figure 5.12 Block diagram of overall navigational controller for the robot……………. 75 Figure 6.1 Schematic of robot environment……………………………………………….…. 78 viii LIST OF TABLES Table 4.1 Rule base for centering mode. ……………………………………………….…… 54 Table 4.2 Rule Base for Wall Hugging mode. ……………………………………………….58 ix