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Enhanced Guidelines to Implement 19.2 MHz Crystal for Small PCB/High Thermal Layouts 80-VP447-10 Rev. A Qualcomm Confidential and Proprietary Restricted Distribution. Not to be distributed to anyone who is not an employee of either Qualcomm or a subsidiary of Qualcomm without the express approval of Qualcomm's Configuration Management. Qualcomm Confidential and Proprietary Restricted Distribution. Not to be distributed to anyone who is not an employee of either Qualcomm or a subsidiary of Qualcomm without the express approval of Qualcomm's Configuration Management. Not to be used, copied, reproduced in whole or in part, nor its contents revealed in any manner to others without the expresswritten permission of Qualcomm. Qualcomm reserves the right to make changes to the product(s) or information contained herein without notice. No liability isassumed for any damages arising directly or indirectly by their use or application. The information provided in this document is provided on an "as is" basis. QUALCOMM is a registered trademark of QUALCOMM Incorporated in the United States and may be registered in other countries. Otherproduct and brand names may be trademarks or registered trademarks of their respective owners. CDMA2000 is a registered certification mark of the Telecommunications IndustryAssociation, used under license. ARM is a registered trademark of ARM Limited. QDSP is a registered trademark of QUALCOMM Incorporated in the United States and other countries. This technical data may be subject to U.S. and international export, re-export, or transfer ("export") laws. Diversion contrary to U.S. and international law is strictly prohibited. QUALCOMM Incorporated 5775 Morehouse Drive San Diego, CA 92121-1714 U.S.A. Copyright © 2011 QUALCOMM Incorporated. All rights reserved. –2– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Revision History Revision Date Description A June 2011 Initial release –3– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Problem Statement Printed circuit boards (PCBs) are becoming smaller and thinner, resulting  in less heat sinking. Heat gradients from a multicore application processor are similar to a  power amplifier and are expected to get worse in the future. XTAL_IN, XTAL_OUT, and GND lines can act as thermal paths to the  XTAL from heat sources. Board-area constraints often require a 19.2 MHz crystal to be placed as  close as possible to the PMIC. –4– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Mitigation Techniques 1. Use a crystal ground island. 2. Thermal resistance can be increased by: a. Increasing the trace length of XTAL_IN, XTAL_OUT, and GND lines through meandering (see slides 7 and 8) without requiring an XTAL placement change b. Decreasing the trace width ≤ 3 mils in XTAL_IN, XTAL_OUT, and XO_GND lines to increase thermal resistance 3. Use TH_XTAL (a 19.2 MHz crystal combined with a thermistor). –5– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Layout and Schematic Checklist Layout checklist : Keep the crystal > 1 cm away from the power amplifiers.  Do not place the crystal directly under the Mobile Station Modem™  (MSM™) (i.e., on the opposite sides of the board). The crystal and thermistor should be placed on a dedicated GND island,  as described in the layout guidelines. The minimum line width is ≤ 3 mils (use the minimum available line width).  XTAL_IN, XTAL_OUT, and GND lines can be meandered to save board  space (see example slides 7 and 8). Isolate XTAL_IN and XTAL_OUT traces from all other traces.   Specifically, isolate XTAL_IN/OUT from any signal carrying a 19.2 MHz clock, such as XO_OUT_D0, XO_OUT_D1, XO_OUT_A0, XO_OUT_A1, etc. Schematic checklist : Use TH_XTAL for small PCBs with high thermal gradients.  –6– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Basic Layout Recommendation XTAL_IN XTAL_OUT Length > 6 mm Width ≤ 3 mils M Note: Isolate XTAL_IN R E and XTAL_OUT traces H T from all other traces. _ O X 19.2 MHz Crystal VREF_XO LDO Ensure GND flood below the thermistor –7– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A GND Island Layout Recommendation Thermal isolation is critical.  Clear at least the first two inner layers of metal.  Do not connect the ground island to any surrounding grounds.  Trace from GND island to GND_XOADC Via from GND_XOADC to main GND –8– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A Option A – For PCBs with High Thermal Considerations Layer 1 GND XTAL_IN 2 mm ≤ 3 mils line width for XTAL_IN, XTAL_OUT, and GND Thermistor Ensure that the XTAL_IN, XTAL_OUT, and GND lines do not cross any traces on 2.5 mm XTAL_OUT the layer below it.  Meander the XTAL_IN , XTAL_OUT, and GND lines to achieve > 6 mm in length.  Any meandering pattern can be chosen to minimize the occupied board space.  The lines can be meandered between the 19.2 MHz crystal pads on the top layer, as shown in the figure.  The recommended line width for XTAL_IN, XTAL_OUT, and GND is ≤ 3 mils (use the minimum available line width.) –9– Qualcomm Confidential and Proprietary | MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION | 80-VP447-10 Rev. A