DIGITAL ALGORITHMS FOR ANALOG ADAPTIVE FILTERS by Anthony Chan Carusone A thesis submitted in conformity with the requirements for the degree of Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto (cid:211) Copyright by Anthony Chan Carusone, 2002 DIGITAL ALGORITHMS FOR ANALOG ADAPTIVE FILTERS Anthony Chan Carusone Degree of Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto 2002 Abstract The use of analog adaptive filters in modern integrated systems is limited by the com- plexity of the analog adaptation hardware and by dc offset effects which limit the adapta- tion accuracy. Both problems can be addressed by using an analog filter with a digital adaptation algorithm. The design of digitally programmable analog filters suitable for adaptive applications is examined. Novel Gm-C circuits are described and implemented in a CMOS prototype 5th order integrated filter with digitally programmable poles and zeros. However, the greatest challenge associated with performing digital adaptation of an analog filter is obtaining the gradient information without overcomplicating the analog design. Three main approaches to overcoming this challenge are described. First, the gradient informa- tion is obtained by correlating changes in the output squared error to independent dither on the adapted parameters. Second, the internal state signals (and, hence, the gradient signals) are calculated from a time delayed input vector using a co-ordinate transforma- tion. Third, time delayed estimates of the filter input are obtained digitally from the filter output and used to calculate the required gradient signals. All three techniques use digital ii signal processing to obtain the gradient information and require little, if any, additional analog hardware. The performance of the new adaptive algorithms are discussed and several variations are proposed to simplify integrated implementations. The prototype integrated analog filter was used as a testbed to verify two of the novel algorithms. Gra- dient descent optimization of analog filter parameters was successfully performed with- out access to any of the filter’s internal state signals, which was not previously possible. As a result, designers of analog adaptive filters are now free to perform the filter design without being restricted by the requirements of the adaptation algorithm. iii Acknowledgements First and foremost, I would like to thank my supervisor and friend Prof. David A. Johns for providing an interesting project, constant direction, valuable advice, and most of all, for providing me with opportunity. He has my appreciation and tremendous respect. Thanks, also, to my supervisory committee, Prof. Ken Martin and Prof. Bruce A. Francis, and to the external examiner Dr. Ayal Shoval for their time and effort. Their efforts have substantially improved the quality of this thesis. Thanks to all of my peers in the electronics research group. It is not without consid- erable regret that I refrain from attempting to list them all; however, there have been so many people who have contributed in so many different ways that a list somehow seems inappropriate. I would also like to gratefully acknowledge the support of NSERC, CMC, and Micronet. Great personal thanks goes to my family and friends who have provided me with much needed and appreciated support and guidance. Finally, I would like to thank my wife, Soo. She is my partner in everything, and this dissertation is no exception. iv Contents Abstract ii Acknowledgements iv Contents v List of Tables viii List of Figures ix List of Abbreviations xiv Chapter 1: Introduction 1 1.1 Motivation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.2 Applications and the State of the Art. . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 1.2.1 Digital Magnetic Storage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2.2 Ethernet Over Copper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2.3 High Speed Serial Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2.4 Optical and Wireless. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.3.1 The Least Mean-Square (LMS) Algorithm. . . . . . . . . . . . . . . . . . . . . . . 8 1.3.2 DC Offset Effects in Analog LMS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.4 Outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 1.5 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Chapter 2: Digitally Programmable Gm-C Filters 17 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 2.2 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 2.2.1 A CMOS Transconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.2 Digitally Programmable Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.2.3 Miller Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2.2.4 Common Mode Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.2.5 Prototype. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2.3 Experimental Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 2.3.1 Programmable Transconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2.3.2 Frequency Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2.3.3 Linearity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2.3.4 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 v 2.3.5 Spurious-Free Dynamic Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2.4 Fine Tuning the Transconductances . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 2.4.1 4-Bit Vcntrl DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2.4.2 Hysteresis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2.4.3 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 2.5 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 2.6 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 2.7 Appendix - Derivation of Eqn. (2.1). . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 2.8 Appendix - Digital Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 2.9 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Chapter 3: The Dithered Linear Search Algorithm 52 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 3.2 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 3.2.1 The Least Mean Square (LMS) Algorithm. . . . . . . . . . . . . . . . . . . . . . 54 3.2.2 The Differential Steepest Descent Algorithm. . . . . . . . . . . . . . . . . . . 54 3.3 The Dithered Linear Search. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 3.3.1 The Block DLS Algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 3.4 Theoretical Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 3.4.1 Preliminaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.4.2 Convergence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 3.4.3 Perturbation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3.4.4 Noise in the Gradient Estimates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 3.4.5 Misadjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.4.6 Total Excess MSE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.4.7 Comparison of the LMS, DSD, and DLS Algorithms . . . . . . . . . . . . 66 3.5 Behavioral Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 3.5.1 5-Tap FIR Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 3.5.2 3rd Order Continuous Time Orthonormal Ladder Filter. . . . . . . . . . 69 3.6 Different Dither Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 3.7 Dc Offset Effects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 3.8 Subsampling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78 3.9 Quantization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80 3.10 Experimental Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 3.10.1 1st Order Lowpass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 3.10.2 5th Order Orthonormal Ladder Filter. . . . . . . . . . . . . . . . . . . . . . . . . 85 3.11 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 3.12 Appendix - Proof of Eqn. (3.30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 3.13 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 vi Chapter 4: Filter Adaptation Using Co-Ordinate Transformations 92 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 4.2 FIR Filter Adaptation Using Co-Ordinate Transformations . . . . . . . .93 4.2.1 The LMS Algorithm with a Co-ordinate Transform. . . . . . . . . . . . . . 93 4.2.2 The LMS Algorithm with an Inverse Co-ordinate Transform. . . . . . 95 4.3 Convergence and Misadjustment Analysis . . . . . . . . . . . . . . . . . . . . . . .97 4.4 Extension to IIR and Continuous Time Filters. . . . . . . . . . . . . . . . . . . .99 4.5 Simulation Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 4.5.1 Orthonormal Ladder Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 4.5.2 Feed Forward Companion Form Filter. . . . . . . . . . . . . . . . . . . . . . . 105 4.6 Hardware Implementation Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . .108 4.6.1 Signed Algorithms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 4.6.2 Subsampling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 4.6.2.1 Subsampling an LMS transversal filter . . . . . . . . . . . . . . . . 112 4.6.2.2 Extension to adaptive linear combiners . . . . . . . . . . . . . . . 115 4.7 Experimental Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116 4.8 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120 4.9 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122 Chapter 5: Obtaining Gradient Signals by Unknown Input State Observation 124 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124 5.2 Unknown Input Observation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125 5.3 Approximate Time Delayed State Observation . . . . . . . . . . . . . . . . . .126 5.3.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 5.3.2 Derivation of the Approximate Inverse Filter. . . . . . . . . . . . . . . . . . 128 5.3.3 Approximation Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 5.3.4 Transmission Zeros in the Adapted Filter. . . . . . . . . . . . . . . . . . . . . 131 5.4 Simulation Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131 5.4.1 2-Tap Transversal Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 5.4.2 Effect of Mismatches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 5.4.3 Dc Offset Effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 5.4.4 5th Order Continuous Time Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . 139 5.5 Hardware Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140 5.6 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .142 5.7 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143 Chapter 6: Conclusion 145 6.1 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145 6.2 Future Work. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .146 6.3 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148 vii List of Tables Table 2.1 Summary of prototype filter IC measurements. . . . . . . . . . . . . . . . . . . .45 Table 2.2 Digital register file address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Table 3.1 Performance measures for gradient descent adaptive algorithms. . . . . .67 Table 3.2 Summary of adaptive algorithms for the 5-tap transversal filter simula- tions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 Table 3.3 Summary of adaptive algorithm simulations for the 3rd order orthonormal ladder filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 Table 3.4 Comparison of relative excess MSE in steady state observed in simulations using different algorithms and dither signals. . . . . . . . . . . . . . . . . . . . . .77 Table 6.1 Comparison of digital algorithms for analog adaptive filters. . . . . . . .146 viii List of Figures Figure 1.1 System architectures for digital magnetic recording read channels. . . . . .3 Figure 1.2 Adaptive echo cancellation in a full-duplex wired digital communication transceiver: (A) digital, (B) mixed signal, (C) analog. . . . . . . . . . . . . . . . .6 Figure 1.3 An LMS analog adaptive filter as a 2-input, 2-output system. . . . . . . . . .8 Figure 1.4 Analog implementation of the LMS parameter update equation. . . . . .10 Figure 1.5 DC tap for adaptive offset cancellation. . . . . . . . . . . . . . . . . . . . . . . . . .10 Figure 1.6 Median-based DC offset compensation scheme. . . . . . . . . . . . . . . . . . .11 Figure 2.1 Three transconductors based upon triode-region MOS devices (M3). .20 Figure 2.2 A five-bit programmable triode conductance. . . . . . . . . . . . . . . . . . . . .21 Figure 2.4 Differential integrators: (A) Gm-C (B) Gm-Opamp-C. . . . . . . . . . . . . .22 Figure 2.3 Digital control of the output current mirror gain. . . . . . . . . . . . . . . . . .22 Figure 2.5 Current input CMOS active integrators. . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 2.6 Block diagram of the continuous time CMFB circuit. . . . . . . . . . . . . . .24 Figure 2.7 Schematic diagram of the continuous time CMFB. . . . . . . . . . . . . . . . .24 Figure 2.8 CMFB loop block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 2.9 Redesigned CMFB loop block diagram. . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 2.10 Redesigned Miller integrator to reduce common mode loop gain. . . . .26 Figure 2.11 5th order orthonormal ladder filter structure with multiple feed-ins. . .27 Figure 2.12 Die photo of the prototype. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Figure 2.13 First order Gm-C filter with programmable pole and dc gain. . . . . . . .27 Figure 2.14 Gain of the first order filter as a function of the G control word. . .29 m1 Figure 2.15 Test setup used to isolate the frequency response of the filter. . . . . . . .30 Figure 2.16 Magnitude response of the reference filter path, H (s). . . . . . . . . . . . .30 ref Figure 2.17 Measured frequency responses of the orthonormal ladder. . . . . . . . . . .31 Figure 2.18 Measured frequency response of the lowpass orthonormal ladder showing ringing around 500 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Figure 2.20 Output spectrum of the 1st order filter with an input tone at 8 MHz. .32 Figure 2.19 Simulated magnitude response of the 5th order lowpass filter. . . . . . . .32 Figure 2.21 Spectrum analyzer screen shot of the 5th order filter output THD. . . .33 Figure 2.22 THD of the 5th order lowpass filter vs. output amplitude. . . . . . . . . . .33 Figure 2.23 THD of 5th order lowpass filter vs. input frequency. . . . . . . . . . . . . . .34 Figure 2.24 Linearity simulations of the 5th order lowpass filter. . . . . . . . . . . . . . . .35 ix Figure 2.25 Noise spectrum of (A) the reference and (B) the signal paths. . . . . . . .36 Figure 2.26 Total harmonic distortion power of the 5th order filter referenced to the filter output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Figure 2.27 Using a four-bit DAC to program the gate control voltage, Vcntrl. . . .38 Figure 2.29 A systematic offset error in the CMFB. . . . . . . . . . . . . . . . . . . . . . . . . .39 Figure 2.28 Details of the 4-bit DAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Figure 2.30 Implementation of DAC current sources in terms of unit current sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Figure 2.31 Probed DAC output voltage vs. 4-bit input word for different coarse con- trol words. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Figure 2.32 Normalized gain of the 1st order test structure vs. 4-bit input word for dif- ferent coarse control words. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Figure 2.33 Simulation results of the DAC subcircuit. . . . . . . . . . . . . . . . . . . . . . . . .42 Figure 2.34 Current consumption of the prototype IC by functional block. . . . . . .43 Figure 2.35 Small-signal equivalent half-circuit of the transconductor. . . . . . . . . . .47 Figure 2.36 Sample timing diagram for serial digital interface. . . . . . . . . . . . . . . . . .49 Figure 2.37 Schematic diagram for a 4-pin digital serial interface. . . . . . . . . . . . . . . .50 Figure 3.1 Block diagram of the dithered linear search algorithm. . . . . . . . . . . . . .57 Figure 3.2 Perturbation in a 2-dimensional parameter space using (A) the DSD algo- rithm (B) the DLS algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 Figure 3.3 Model matching simulations block diagram. . . . . . . . . . . . . . . . . . . . . . .68 Figure 3.4 Simulation results for a 5-tap adaptive transversal filter. . . . . . . . . . . . .70 Figure 3.5 A 3rd order orthonormal ladder filter using multiple feed-ins of the input signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 Figure 3.6 Simulation results for a 3rd order continuous time adaptive orthonormal ladder with variable feed-ins using the DLS, Block DLS, and DSD algo- rithms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 Figure 3.7 Dithered linear search using pseudorandom binary dither. . . . . . . . . . .73 Figure 3.9 The dither signals used for the DSD algorithm with 3 parameters. . . . .74 Figure 3.8 Divergent learning curve of the DLS with a long string of consecutive ze- ros in the binary dither. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 Figure 3.10 Dither signals generated from Hadamard sequences suitable for 3 param- eters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76 Figure 3.11 Simulation results for a 3rd order continuous time adaptive orthonormal ladder with variable feed-ins using the DLS algorithm with Hadamard dither. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76 x