DESIGN, FABRICATION, MODELING AND CHARACTERIZATION OF ELECTROSTATICALLY-ACTUATED SILICON MEMBRANES A Thesis Presented to The Faculty of California Polytechnic State University, San Luis Obispo In Partial Fulfillment Of the Requirements for the Degree Master of Science in Engineering with Specialization in Materials Engineering By Brian C. Stahl May 2009 © 2009 Brian C. Stahl ALL RIGHTS RESERVED ii COMMITTEE MEMBERSHIP Title: DESIGN, FABRICATION, MODELING, AND CHARACTERIZATION OF ELECTROSTATICALLY- ACTUATED SILICON MEMBRANES Author: Brian C. Stahl Date Submitted: May 2009 Committee Chair: Dr. Richard N. Savage Associate Professor of Materials Engineering California Polytechnic State University, San Luis Obispo Committee Member: Dr. William L. Hughes Assistant Professor of Materials Science and Engineering Boise State University Committee Member: Dr. Garret J. Hall Associate Professor of Civil and Environmental Engineering California Polytechnic State University, San Luis Obispo iii ABSTRACT Design, Fabrication, Modeling and Characterization of Electrostatically-Actuated Silicon Membranes Brian C. Stahl This thesis covers the design, fabrication, modeling and characterization of electrostatically actuated silicon membranes, with applications to microelectromechanical systems (MEMS). A microfabrication process was designed to realize thin membranes etched into a silicon wafer using a wet anisotropic etching process. These flexible membranes were bonded to a rigid counterelectrode using a photo-patterned gap layer. The membranes were actuated electrostatically by applying a voltage bias across the electrode gap formed by the membrane and the counterelectrode, causing the membrane to deflect towards the counterelectrode. This deflection was characterized for a range of actuating voltages and these results were compared to the deflections predicted by calculations and Finite Element Analysis (FEA). This thesis demonstrates the first electrostatically actuated MEMS device fabricated in the Cal Poly, San Luis Obispo Microfabrication Facility. Furthermore, this thesis should serve as groundwork for students who wish to improve upon the microfabrication processes presented herein, or who wish to fabricate thin silicon structures or electrostatically actuated MEMS structures of their own. iv ACKNOWLEDGEMENTS First and foremost, the author thanks his committee and especially his advisors Prof. Richard N. Savage and Prof. William L. Hughes for their guidance and wisdom over the years, and for helping him realize just how much he has to learn. The author thanks the Cal Poly Microsystems Technology Group for their ideas, support, encouragement, assistance and discussion. The author is especially grateful to David Getchel for building some of the equipment used in this study, Dustin Dequine for helpful discussions about etching and Steven Meredith for his assistance with lithography mask design. The author is grateful to Hans Mayer for helpful discussions on the microfluidic applications of membranes. The author thanks Matthew Lewis, Dylan Chesbro, Sean Kaylor, Ryan Rivers, Daniel Marrujo, Eric Sackmann, Daniel Helms and Nicholas Vickers for their friendship and encouragement. The author thanks the entire faculty and staff of the Materials Engineering department for providing a superior undergraduate education, especially Prof. Linda Vanasupa for first introducing him to the department that would become his home for six and a half years. The author thanks his friends and family for their unending support and encouragement, through good times and bad. The author is especially grateful to Mr. Paul Bonderson for generously establishing the Bonderson Fellowship, from which the author has received financial support and the opportunity to pursue graduate studies. The author wishes to acknowledge support from the University of California, Santa Barbara Materials Research Laboratory and the Materials Research Facilities Network, especially Dr. Anika Odukale and Dr. Tom Mates. v TABLE OF CONTENTS LIST OF TABLES ........................................................................................................... ix  LIST OF FIGURES .......................................................................................................... x  LIST OF ABBREVIATIONS ....................................................................................... xiii  LIST OF SYMBOLS ...................................................................................................... xv  SECTION 1: INTRODUCTION ..................................................................................... 1  1.1 Background .............................................................................................................. 1  1.2 Motivation ................................................................................................................ 3  SECTION 2: DESIGN ...................................................................................................... 4  2.1 Summary .................................................................................................................. 4  2.2 Membrane Mechanics .............................................................................................. 4  2.3 Electrostatics ............................................................................................................ 6  2.4 The Initial Design Equation ..................................................................................... 7  2.5 The Nonlinear Electrostatic Force Response ........................................................... 8  2.6 Design Constraints ................................................................................................. 14  2.7 Device Dimensions ................................................................................................ 16  2.8 Anisotropic Etching ................................................................................................ 19  2.9 The Final Device Package ...................................................................................... 24  vi SECTION 3: FABRICATION ....................................................................................... 30  3.1 Summary ................................................................................................................ 30  3.2 Wafer Selection ...................................................................................................... 31  3.3 Thermal Diffusion .................................................................................................. 32  3.4 Diffusion Characterization with D-SIMS .............................................................. 36  3.5 Wet Thermal Oxidation .......................................................................................... 38  3.6 Positive Resist Photolithography and Patterning ................................................... 42  3.7 Wet Anisotropic Etching ........................................................................................ 44  3.8 Etched Surface Morphology ................................................................................... 51  3.9 Counterelectrode Physical Vapor Deposition ........................................................ 64  3.10 Counterelectrode Photolithography and Patterning ............................................. 65  3.11 SU-8 Negative Photoresist Processing ................................................................. 66  3.12 Final Assembly ..................................................................................................... 69  3.13 Surviving Devices ................................................................................................ 71  3.14 Yield Analysis ...................................................................................................... 72  SECTION 4: MODELING ............................................................................................ 77  4.1 Summary ................................................................................................................ 77  4.2 Finite Element Analysis ......................................................................................... 77  4.3 FEA Results............................................................................................................ 86  SECTION 5: DEVICE CHARACTERIZATION ....................................................... 90  vii 5.1 Summary ................................................................................................................ 90  5.2 Actuation Setup ...................................................................................................... 90  5.3 Interpreting the Results .......................................................................................... 93  SECTION 6: DISCUSSION ........................................................................................... 97  6.1 Modeling and Characterization Results ................................................................. 97  6.2 Fabrication Issues and Observations .................................................................... 103  SECTION 7: CONCLUSIONS AND FUTURE WORK ........................................... 108  REFERENCES .............................................................................................................. 110  APPENDIX A: Lithography Masks ............................................................................ 115  APPENDIX B: Raw and Normalized Deflection ....................................................... 125  APPENDIX C: Maximum Deflection ......................................................................... 141  APPENDIX D: Deflection-Voltage Curves ................................................................. 143  APPENDIX E: Initial Design Equation Model Comparison .................................... 146  viii LIST OF TABLES Table 2.1: Membrane thicknesses and side lengths corresponding to a 22 µm 19 deflection. Table 2.2: Etch window side lengths. 23 Table 3.1: Custom low-TTV wafer specifications for deep-etching applications. 32 Table 3.2: The two-step spin program used to coat wafers with spin-on dopant. 33 Table 3.3: Thermal diffusion process designed to heavily dope silicon wafers with boron to create an etch-stop layer. 35 Table 3.4: Thermal oxidation process designed to grow a 700nm wet oxide. 42 Table 3.5: 3-step spin process for positive photoresist application. 43 Table 3.6: Aluminum sputtering parameters. 65 Table 3.7: SU-8 coating spin-program designed to yield ~40µm film. 67 Table 3.8: Soft-bake times and temperatures for ~40µm-thick SU-8. 67 Table 3.9: Post-exposure bake times and temperatures for ~40µm-thick SU-8. 68 Table 3.10: Surviving devices and their key dimensions. 71 Table 4.1: Generic CoventorWare process to model membranes. 78 Table 4.2: Base design dimensions for FEA. 85 Table 4.3: FEA investigation of device dimensions. 86 Table 6.1: Parameters used to model membrane deflection with hand calculations. 98 ix LIST OF FIGURES Figure 2.1: Coordinate system used with Eq. (2.2) and (2.3). 5 Figure 2.2: Behavior of ideal (left) and real (right) membranes under electrostatic actuation. 10 Figure 2.3: Force-displacement plot showing the idealized mechanical restoring force kx (straight line) and the electrostatic force for a series of actuation voltages (curves). 12 Figure 2.4: A standard (100) wafer, showing the orientation of the major flat and membrane. 16 Figure 2.5: An etch pit in (100) silicon showing the 54.74° sidewalls. 22 Figure 2.6: Principal crystallographic planes for a cubic unit cell. 22 Figure 2.7: Schematic of the final device package. 24 Figure 2.8: A single die from the silicon etch window mask. 25 Figure 2.9: A counterelectrode for a 4,400µm-wide membrane. 26 Figure 2.10: An SU-8 gap feature corresponding to a 4,400µm membrane. 27 Figure 2.11: A 3-D perspective view of an assembled device. 28 Figure 2.12: An exploded 3-D view of the final device. 28 Figure 2.13: The back side of the final device. 29 Figure 3.1: Orientation of the wafers in the boat prior to thermal diffusion. 34 Figure 3.2: Orientation of the tube furnace, wafer boat and gas flow (not to scale). 35 Figure 3.3: Boron concentration profiles after thermal diffusion. 37 Figure 3.4: Device wafers book-ended by dummy wafers, loaded in a quartz boat. 41 Figure 3.5: The reflux-condenser etch vessel. 48 Figure 3.6: A diagram of the reflux-condenser etch vessel. 49 Figure 3.7: Measuring the etch depth with a stylus profilometer. 50 x