THIRD EDITION Computer Organization Design THE HARD W ARE / SOFTWARE INTERFACE ACKNOWLEDGEMENTS Figures 1.9, 1.15 Courtesy of Intel. Computers in the Real World: Figure 1.11 Courtesy of Storage Technology Corp. Photo of "A Laotian villager," courtesy of David Sanger. Figures 1.7.1, 1.7.2,6.13.2 Courtesy of the Charles Babbage Institute, Photo of an "Indian villager," property of Encore Software, Ltd., India. University of Minnesota Libraries, Minneapolis. Photos of "Block and students~ and "a pop-up archival satellite tag,~ Figures 1.7.3, 6.13.1, 6.13.3,7.9.3,8.11.2 Courtesy of IBM. courtesy of Professor Barbara Block. Photos by Scott T.1ylor. Figure 1.7.4 Courtesy ofCray Inc. Photos of "Professor Dawson and student" and "the Mica micromote,~ courtesy of AP/World Wide Photos. Figure 1.7.5 Courtesy ofApple Computer, Inc. Photos of "irn.1ges of pottery fragments" and "a computer reconstruc- Figure 1.7.6 Courtesy of the Computer History Museum. tion,~ courtesy of Andrew Willis and David B. Cooper, Brown University, Figure 7.33 Courtesy ofAMD. Division of Engineering. Figures 7.9.1, 7.9.2 Courtesy of Museum of Science, Boston. Photo of "the Eurostar TGV train," by los van der Kolk. Figure 7.9.4 Courtesy of MIPS Technologies, Inc. Photo of "the interior of a Eurostar TGV cab," by Andy Veitch. Figure 8.3 e Peg Skorpinski. Photo of "firefighter Ken Whitten," courtesy of'W"orld Economic Forum. Figure 8.11.1 Courtesy of the Computer Musru.m of America. Graphic of an "artificial retina,~ Cl The San Francisco Chronicle. Reprinted by permission. Figure 8.11.3 Courtesy of the Commercial Computing Museurll. Image of "A laser scan of Michelangelo's statue of David," courtesy of Figures 9.11.2, 9.11.3 Courtesy of NASA Ames Research Center. Muc Levoy and Dr. Franca Falletti, director of the Galleria dell 'Acca- Figure 9.11.4 Courtesy of Lawrence Livermore National Laboratory. demia, Italy. "An image from the Sistine Chapel," courtesy of Luca Feuati. IR image recorded using the scanner for IR reflectography of the INOA (National Institute for Applied Optics, http://arte.ino.it ) at the Opificio delle Pietre Dure in Florence. T H I R D EDITION Computer Organization and Design THE HARDWARE / SOFTWARE INTERFACE David A. Patterson University of California. Berkeley John L Hennessy Stanford University With a co ntribution by Peter J. Ashenden James R. Lams Daniel J. Sarin Ashenden Designs Pty Ltd Microsoft Research Duke Un iversity AMSTERDAM ' BOSTON ' HEIDELBERG ' WNDON NEW YORK ' OXFORD ' PARIS ' SAN DIEGO SAN FRANCISCO ' SINGAPORE ' SYDNEY ' roJ,'.YO ELSEVIER Morgan Kaufmann is an imprint of Elsevier MORGAN KAUFMANN PUBLISHERS Senior Editor Denise E. M. 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Permissions may be sought directly from Elsevier's Science & Technology Rights Department in Oxford, UK: phone: (+44) 1865843830, fax: (+44) 1865853333, e-mail: Contents v Contents Preface IX CHAPTERS a Computer Abstractions and Technology 2 1.1 Introduction 3 1.2 Below Your Program I I 1.3 Under the Covers IS 1.4 Real Stuff: Manufacturing Pentium 4 Chips 28 1.5 Fallacies and Pitfalls 33 1.6 Concluding Remarks 35 1.7 Historical Perspective and Further Reading 36 1.8 Exercises 36 COMPUTERS IN THE REAL WORLD Information Technology for the 4 Billion without IT 44 B Instructions: Language of the Computer 46 2. 1 Introduction 48 2.2 Operations of the Computer Hardware 49 2.3 Operands of the Computer Hardware 52 2.4 Representing Instructions in the Computer 60 2.5 Logical Operations 68 2.6 Instructions for Making Decisions 72 2.7 Supporting Procedures in Computer Hardware 79 2.8 Communicating with People 90 2.9 MIPS Addressing for 32-Bit Immediates and Addresses 95 2.10 Translating and Starting a Program 106 2. I I How Compilers Optimize 116 2. 12 How Compilers Work: An Introduction 121 vI Contents 2. 13 ACSort Example to Put It All Together 121 2. 14 Implementing an Object-Oriented Language 130 2.1 5 Arrays versus Pointers 130 2.1 6 Real Stuff: IA-32 Instructions 134 2.1 7 Fallacies and Pitfalls 143 2.18 Concluding Remarks 145 2. 19 Historical Perspective and Further Reading 147 2.20 Exercises 147 COMPUTERS IN THE REAL WORLD Helping Save Our Environment with Data 156 II Arithmetic for Computers 158 3. 1 Introduction 160 3.2 Signed and Unsigned Numbers 160 3.3 Addition and Subtraction 170 3.4 Multiplication 176 3.5 Division 183 3.6 Floating Point 189 3.7 Rea l Stuff: Floating Point in the IA-32 217 3.8 Fallacies and Pitfalls 220 3.9 Concluding Remarks 225 3.10 Historical Perspective and Further Reading 229 3. 11 Exercises 229 COMPUTERS IN THE REAL WORLD Reconstructing the Ancient World 236 a Assessing and Understanding Performance 238 4.1 Introduction 240 4.2 CPU Perfonnance and Its Factors 246 4.3 Evaluating Performance 254 4.4 Rea l Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors 259 4.5 Fallacies and Pitfalls 266 4.6 Concluding Remarks 270 4.7 Historical Perspective and Further Reading 272 4.8 Exercises 272 COMPUTERS IN THE REAL WORLD Moving People Faster and More Safely 280 Contents .11 The Processor: Datapath and Control 282 5. 1 Introduction 284 5.2 Logic Design Conventions 289 5.3 Building a Datapath 292 5.4 A Simple Implementation Scheme 300 5.5 A Multicycle Implementation 3 18 5.6 Exceptions 340 5.7 Microprogramming: Simplifying Co ntrol Design 346 .. .. 5.8 An Introduction to Digital Design Using a Hardware Design Language 346 5.9 Real Stuff: The Organization of Recent Pentium Implementations 347 5.10 Fallacies a nd Pitfalls 350 5. II Concluding Remarks 352 5. 12 Historical Perspective and Further Reading 353 5.13 Exercises 354 COMPUTERS IN THE REAL WORLD Empowering the Disabled 366 II Enhancing Performance with Pipelining 368 6.1 An OverviewofPipelining 370 6.2 A Pipelined Datapath 384 6.3 Pipelined Cont rol 399 6.4 Data Hazards and Forwarding 402 6.5 Data Hazards and Stalls 41 3 6.6 Branch Hazards 416 6.7 Using a Hardware Description Language to Describe and Model a Pipeline 426 6.8 Exceptions 427 6.9 Adva nced Pipelining: Extracting More Performance 432 6.10 Real Stuff: The Pentium 4 Pipeline 448 6.11 Fallacies and Pitfalls 451 6. 12 Concluding Remarks 452 6. 13 Historical Perspective and Further Reading 454 6.14 Exercises 454 COMPUTERS IN THE REAL WORLD Mass Communication without Gatekeepers 464 vIII Contents Large and Fast: Exploiting Memory Hierarchy 466 II 7.1 Introduction 468 7.2 The Basics of Caches 473 7.3 Measuring and Improving Cache Performance 492 7.4 Virtual Memory 511 7.5 A Common Framework for Memory Hierarchies 538 7.6 Real Stuff: The Pentium P4 and the AMD Opteron Memory Hierarchies 546 7.7 Fallacies and Pitfalls 550 7.8 Concluding Remarks 552 7.9 Historical Perspective and Further Reading 555 7. 10 Exercises 555 COMPUTERS IN THE REAL WORLD Saving the World's Art Treasures 562 EI Storage, Networks, and Other Peripherals 564 8.1 Introduction 566 8.2 Disk Storage and Dependability 569 8.3 Networks 580 8.4 Buses and Other Connections between Processors, Memory, and I/O Devices 581 8.5 Interfacing I/O Devices to the Processor, Memory, and Operating System 588 8.6 I/O Performance Measures: Examples from Disk and File Systems 597 8.7 Designing an I/O System 600 8.8 Real Stuff: A Digital Camera 603 8.9 Fallacies and Pitfalls 606 8.10 Concluding Remarks 609 8.11 Historical Perspective and Further Reading 6 11 8.12 Exercises 6 11 COMPUTERS IN THE REAL WORLD Saving Uves through Better Diagnosis 622 ra Multiprocessors and Clusters 9-2 9. 1 Introduction 9-4 9.2 Progra mming Multiprocessors 9-8 9.3 Multiprocessors Connected by a Single Bus 9-11 Contents Ix 9.4 Multiprocessors Connected by a Network 9-20 9.5 Clusters 9-25 9.6 Network Topologies 9-27 9.7 Multiprocessors Inside a Chip and Multithreading 9-30 9.8 Real Stuff: The Coogle Cluster of PCs 9-34 9.9 Fallacies and Pitfalls 9-39 9. 10 Concluding Remarks 9-42 9. I I Historical Perspective and Further Reading 9-47 9. 12 Exercises 9-55 APPENDICES a Assemblers, Linkers, and the SPIM Simulator A-2 A. I Int roduction A-3 A.2 Assemblers A- I0 A.3 Linkers A- 18 AA Loading A- 19 A.5 Memory Usage A-20 A.6 Procedure Call Co nvention A-22 A.7 Exceptions and Interrupts A-33 A.8 Input and Output A-38 A.9 SPIM A-40 A. IO MIPS R2000 Assembly Language A-45 A. I I Concluding Remarks A-8 I A.I2 Exercises A-82 [I The Basics of Logic Design B-2 8.1 Int roduction B-3 8. 2 Gates, Truth Tables, and Logic Equations B-4 8.3 Combinational Logic B-8 B.4 Using a Hardware Description Language B-20 8.5 Constructing a Basic Arithmetic Logic Unit B-26 B.6 Faster Addition: Car ry Lookahead B-38 B.7 Clocks B-47 B.8 Memory Elements: Flip -flops, Latches, and Registers B-49 8.9 Memory Elements: SRAMs and DRAMs B-57 8. 10 Finite State Machines B-67 B. I I Timing Methodologies B-72