TECHNOLOGY IN ACTION™ Beginning FPGA: Programming Metal Your brain on hardware — Aiken Pang Peter Membrey Beginning FPGA: Programming Metal Your brain on hardware Aiken Pang Peter Membrey Beginning FPGA: Programming Metal: Your Brain on Hardware Aiken Pang Peter Membrey Chelmsford, Massachusetts Lai Chi Kok, Kowloon, Hong Kong USA China ISBN-13 (pbk): 978-1-4302-6247-3 ISBN-13 (electronic): 978-1-4302-6248-0 DOI 10.1007/978-1-4302-6248-0 Library of Congress Control Number: 2016962137 Copyright © 2017 by Aiken Pang and Peter Membrey This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Trademarked names, logos, and images may appear in this book. Rather than use a trademark symbol with every occurrence of a trademarked name, logo, or image we use the names, logos, and images only in an editorial fashion and to the benefit of the trademark owner, with no intention of infringement of the trademark. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. While the advice and information in this book are believed to be true and accurate at the date of publication, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Managing Director: Welmoed Spahr Lead Editor: Natalie Pao Technical Reviewer: Brendan Horan Editorial Board: Steve Anglin, Pramila Balan, Laura Berendson, Aaron Black, Louise Corrigan, Jonathan Gennick, Robert Hutchinson, Celestin Suresh John, Nikhil Karkal, James Markham, Susan McDermott, Matthew Moodie, Natalie Pao, Gwenan Spearing Coordinating Editor: Jessica Vakili Copy Editor: Lori Jacobs Compositor: SPi Global Indexer: SPi Global Artist: SPi Global Distributed to the book trade worldwide by Springer Science+Business Media New York, 233 Spring Street, 6th Floor, New York, NY 10013. Phone 1-800-SPRINGER, fax (201) 348-4505, e-mail [email protected], or visit www.springeronline.com. Apress Media, LLC is a California LLC and the sole member (owner) is Springer Science + Business Media Finance Inc (SSBM Finance Inc). SSBM Finance Inc is a Delaware corporation. For information on translations, please e-mail [email protected], or visit www.apress.com. Apress and friends of ED books may be purchased in bulk for academic, corporate, or promotional use. eBook versions and licenses are also available for most titles. For more information, reference our Special Bulk Sales–eBook Licensing web page at www.apress.com/bulk-sales. Any source code or other supplementary materials referenced by the author in this text are available to readers at www.apress.com. For detailed information about how to locate your book’s source code, go to www.apress.com/source-code/. Readers can also access source code at SpringerLink in the Supplementary Material section for each chapter. Printed on acid-free paper Contents at a Glance About the Authors ��������������������������������������������������������������������������������������������������xiii About the Technical Reviewer ���������������������������������������������������������������������������������xv ■ Part I: Getting Started with FPGA �������������������������������������������������������1 ■ Chapter 1: What Is an FPGA and What Can It Do? �������������������������������������������������3 ■ Chapter 2: Our Weapon of Choice �����������������������������������������������������������������������13 ■ Chapter 3: Lock and Load ������������������������������������������������������������������������������������23 ■ Chapter 4: Hello World! ���������������������������������������������������������������������������������������47 ■ Part II: Time Out for Theory ������������������������������������������������������������105 ■ Chapter 5: FPGA Development Timeline ������������������������������������������������������������107 ■ Chapter 6: VHDL 101 ������������������������������������������������������������������������������������������117 ■ Chapter 7: Number Theory for FPGAs ����������������������������������������������������������������125 ■ Chapter 8: Telling the Truth: Boolean Algebra and Truth Tables ������������������������137 ■ Chapter 9: Simplifying Boolean Algebra for FPGA ���������������������������������������������159 ■ Chapter 10: Sequential Logic: IF This, THEN That ����������������������������������������������171 ■ Chapter 11: Combinatorial Logic: Putting It All Together on the FPGA ��������������191 ■ Part III: Let’s Make Something! ������������������������������������������������������219 ■ Chapter 12: Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire ����221 ■ Chapter 13: Temperature Sensors: Is It Hot in Here, or Is It Just Me? ��������������267 ■ Chapter 14: How Fast Can You Run? Ask the Accelerometer! ���������������������������313 iii ■ Contents at a GlanCe ■ Part IV: Taking It Further: Talking to the Raspberry Pi and LED Displays �����������������������������������������������������������������������������������345 ■ Chapter 15: Two-Way Communications with Your Raspberry Pi: SPI ����������������347 ■ Chapter 16: Up in Lights: How to Drive LED Segment Displays �������������������������367 Index ���������������������������������������������������������������������������������������������������������������������381 iv Contents About the Authors ��������������������������������������������������������������������������������������������������xiii About the Technical Reviewer ���������������������������������������������������������������������������������xv ■ Part I: Getting Started with FPGA �������������������������������������������������������1 ■ Chapter 1: What Is an FPGA and What Can It Do? �������������������������������������������������3 1.1 Field-Programmable ...............................................................................................4 1.1.1 Configuration Technology ...........................................................................................................4 1.2 Gates = Logic ..........................................................................................................5 1.2.1 T he Basic Gate Design Block No. 1: Logic Element ....................................................................5 1.2.2 T he Basic Gate Design Block No. 2: Configurable IO Block ........................................................8 1.2.3 T he Basic Gate Design Block No. 3: Internal RAM ......................................................................8 1.3 Arrays Have Many Connections ...............................................................................8 1.4 What Can It Do? .......................................................................................................9 1.5 It Can Get the Job Done Fast! ................................................................................10 1.6 FPGA vs. Processor ...............................................................................................11 1.7 Summary ...............................................................................................................12 ■ Chapter 2: Our Weapon of Choice �����������������������������������������������������������������������13 2.1 What Weapons (FPGAs) Are Available ....................................................................13 2.2 The BeMicro Max 10: Our Weapon of Choice ........................................................14 2.2.1 T he Master: Altera MAX 10 FPGA ..............................................................................................15 2.2.2 T he Emissaries: BeMicro MAX 10 Board Features ...................................................................17 v ■ Contents 2.3 Other Tools ............................................................................................................18 2.3.1 T he Place to Connect Everything: The Breadboard ...................................................................19 2.3.2 Making the Invisible Visible: The Multi-meter...........................................................................20 2.4 Wrap-up ................................................................................................................21 ■ Chapter 3: Lock and Load ������������������������������������������������������������������������������������23 3.1 Getting the Development Toolchain Up and Running ............................................23 3.2 Downloading Altera Tools ......................................................................................24 3.2.1 Altera Toolchains ......................................................................................................................25 3.2.2 Create an Altera Account ..........................................................................................................25 3.2.3 Download the Altera Toolchains ...............................................................................................26 3.3 Install Altera Quartus Prime Lite Edition ................................................................33 3.4 Download BeMicro10 files and Documentation ....................................................44 3.5 Summary ...............................................................................................................45 ■ Chapter 4: Hello World! ���������������������������������������������������������������������������������������47 4.1 Launch Quartus Prime and Create a New Project .................................................47 4.2 Write Code .............................................................................................................61 4.3 Implement Design .................................................................................................69 4.4 Simulate Design ....................................................................................................75 4.5 Burn It! ..................................................................................................................89 4.5.1 Install USB Blaster Driver .........................................................................................................89 4.5.2 Program Design ........................................................................................................................92 4.6 Recapping What We Just Completed ....................................................................97 4.6.1 Timing constraints ....................................................................................................................97 4.6.2 The Implementation ..................................................................................................................97 4.6.3 The Test Bench .......................................................................................................................101 4.7 Summary .............................................................................................................103 4.7.1 But I Don’t have a Mercury Module! .......................................................................................103 vi ■ Contents ■ Part II: Time Out for Theory ������������������������������������������������������������105 ■ Chapter 5: FPGA Development Timeline ������������������������������������������������������������107 5.1 1847—First Theory—Boolean Logic ..................................................................107 5.2 1935—First Boolean Logic in Real World ...........................................................107 5.3 1942—First Electronic Digital Computer ............................................................107 5.4 1960—First MOSFET .........................................................................................108 5.5 1960—First Practical Commercial Logic IC Module ...........................................109 5.6 1962—First Standard Logic ICs Family ..............................................................110 5.7 1963—First CMOS .............................................................................................110 5.8 1964—First SRAM .............................................................................................110 5.9 1965—The Well-Known Law: Moore’s Law ........................................................110 5.10 1970—First PROM ...........................................................................................111 5.11 1971—First EPROM .........................................................................................111 5.12 1975—First F-PLA ...........................................................................................111 5.13 1978—First PAL ...............................................................................................111 5.14 1983—First EEPROM .......................................................................................111 5.15 1983—First GAL ...............................................................................................111 5.16 1983—First Programming Language/Tools for Hardware ................................112 5.17 1985—First FPGA by Xilinx ...............................................................................112 5.18 FPGA vs. ASIC ....................................................................................................112 5.18.1 FPGA Advantages .................................................................................................................112 5.18.2 FPGA Disadvantages .............................................................................................................113 5.18.3 ASIC Advantages ...................................................................................................................113 5.18.4 ASIC Disadvantages ..............................................................................................................114 5.19 Other Technology ...............................................................................................114 5.19.1 CPLD .....................................................................................................................................114 5.19.2 Cypress-PSoC .......................................................................................................................114 5.20 Summary ...........................................................................................................115 vii ■ Contents ■ Chapter 6: VHDL 101 ������������������������������������������������������������������������������������������117 6.1 It Is NOT Another Computer Language ................................................................117 6.2 VHDL File Basic Structure ...................................................................................118 6.2.1 Entity Declaration ...................................................................................................................118 6.2.2 Architecture Body ...................................................................................................................119 6.3 Summary .............................................................................................................123 ■ Chapter 7: Number Theory for FPGAs ����������������������������������������������������������������125 7.1 Vocabulary in VHDL .............................................................................................125 7.1.1 Identifiers ...............................................................................................................................125 7.1.2 Reserved Words—Keywords ..................................................................................................126 7.1.3 Signal, Variable, and Constant ................................................................................................128 7.1.4 Literal: Word for Word .............................................................................................................132 7.2 Grammar in VHDL ................................................................................................134 7.2.1 Statements in VHDL ................................................................................................................134 7.2.2 How to Comment ....................................................................................................................134 7.2.3 <= and := sign .......................................................................................................................134 7.2.4 Begin and End ........................................................................................................................134 7.2.5 Coding Your VHDL with Style ..................................................................................................135 7.3 Summary .............................................................................................................135 ■ Chapter 8: Telling the Truth: Boolean Algebra and Truth Tables ������������������������137 8.1 Boolean Algebra ..................................................................................................137 8.1.1 Simulation Steps for Boolean Algebra Example 2 ..................................................................139 8.1.2 Truth Tables ............................................................................................................................149 8.2 Standard Logic in VHDL .......................................................................................150 8.2.1 Standard Logic Data Types .....................................................................................................151 8.2.2 4-Bit Adder Examples with Standard Logic Types ..................................................................151 8.3 Combinational Logic Design in FPGA ..................................................................157 8.4 Summary .............................................................................................................158 viii ■ Contents ■ Chapter 9: Simplifying Boolean Algebra for FPGA ���������������������������������������������159 9.1 Concurrent Statements .......................................................................................162 9.2 Conditional Signal Assignment—When/Else ......................................................162 9.3 Select Signal Assignment—With/Select .............................................................164 9.4 Process with Case Statement .............................................................................167 9.5 Summary .............................................................................................................170 ■ Chapter 10: Sequential Logic: IF This, THEN That ����������������������������������������������171 10.1 IF Statement ......................................................................................................171 10.1.1 D Flip-Flops with Clear and Preset .......................................................................................172 10.1.2 Shift Registers ......................................................................................................................178 10.1.3 4-Bit Up Counter Design Example ........................................................................................181 10.2 More Than Sequential Logic—Sequential Statements .....................................187 10.3 VHDL Architecture Review .................................................................................189 10.4 Summary ...........................................................................................................190 ■ Chapter 11: Combinatorial Logic: Putting It All Together on the FPGA ��������������191 11.1 Introduction .......................................................................................................191 11.2 First FSM Example—4-Bit Up Counter..............................................................192 11.2.1 Using Altera Quartus to Understand the FSM .......................................................................196 11.3 Combinational Lock Example ............................................................................199 11.3.1 Set Key Sequences ...............................................................................................................200 11.3.2 Unlock Sequences ................................................................................................................200 11.3.3 Code for the Combinational Lock Design .............................................................................201 11.3.4 Simulate the Combinational Lock with ModelSim Script .....................................................206 11.4 A Little Bit More About FSM in Digital Design ...................................................215 11.5 Wrap-up ............................................................................................................216 11.5.1 Review FSMs ........................................................................................................................217 ix