ALM-1912 GPS Filter–LNA Front–End Module Data Sheet Description Features Avago Technologies’ ALM-1912 is a GPS front-end module • Very Low Noise Figure that combines a GPS FBAR filter with high-gain low-noise • Exceptional Cell/PCS/WLAN-Band rejection amplifier (LNA).The LNA uses Avago Technologies’ pro- • Low external component count prietary GaAs Enhancement-mode pHEMT process to achieve high gain with very low noise figure and high • Fully-matched at RF input and RF output linearity. Noise figure distribution is very tightly controlled. • Shutdown current : < 1 uA A CMOS-compatible shutdown pin is included either for • CMOS compatible shutdown pin (SD) turning the LNA on/off or for current adjustment. The filter use Avago Technologies’ leading-edge FBAR filter for • ESD : > 3kV at RFin pin low GPS band insertion loss and exceptional rejection at • 2.9 x 2.0 x 0.95 mm size Cellular, PCS and WLAN band frequencies. • Adjustable bias current via single external resistor/ The low noise figure and high gain, coupled with low current voltage consumption make it suitable for use in critical low-power • Lead-free and Halogen free GPS applications or during low-battery situations. Specifications (Typical performance @ 25°C) Component Image At 1.575GHz, Vdd = 2.7V, Idd = 6mA Surface Mount 2.9 x 2.0 x 0.95 mm3 9-lead MCOB • Gain = 19.3 dB Gnd Vsd • NF = 1.62 dB (pin 9) (pin 8) RF In (pin 1) Vdd (pin 7) • IIP3 = +1.5 dBm • IP1dB = -8 dBm 1912 RF Out (pin 6) • S11 = -9.5 dB WWYY Gnd (pin 2) NC (pin5) • S22 =-13.5 dB Gnd Gnd • Cell-Band Rejection: > 57dBc (pin 3) (pin 4) • PCS-Band Rejection: > 53dBc Top View • WLAN-Band Rejection: > 52dBc Vsd Gnd Application (pin 8) (pin 9) Vdd (pin 7) RF In (pin 1) • GPS Front-end Module Application Circuit RF Out (pin 6) +Vdd = 2.7V NC (pin 5) Gnd (pin 2) VBias Gnd Gnd RBias L (pin 4) (pin 3) Bottom View RFin RFout Note: Package marking provides orientation and identification “1912” = Product Code GPS “YY” = Year of manufacture LNA Filter “WW” = Work week of manufacture Absolute Maximum Rating[1] T =25°C A Absolute Thermal Resistance [3] Symbol Parameter Units Max. (Vdd = 2.7V, Idd = 6mA), θjc = 82.1°C/W Vdd Device Frain to Source Voltage [2] V 4.5 Notes: 1. Operation of this device in excess of any of Idd Drain Current [2] mA 15 these limits may cause permanent damage. Pin,max CW RF Input Power (Vdd = 2.7V. Idd = 6mA) dBm 13 2. Assuming DC quiescent conditions. 3. Thermal resistance measured using Infra-Red Pdiss Total Power Dissipation[4] mW 54 measurement technique. TL Operating Temperature °C -40 to 85 4. Board (module belly) temperature TB is 25°C. Derate 4.2 mW/°C for TB>145.6°C. Tj Junction Temperature °C 150 TSTG Storage Temperature °C -65 to 150 2 Electrical Specifications TA = 25°C, Freq = 1.575GHz, measured on demo board[1] unless otherwise specified – Typical Performance[1] Table 1. Performance at Vdd = Vsd = 2.7V, Idd = 6mA (R2 = 4.7k Ohm, see Fig 7) nominal operating conditions Symbol Parameter and Test Condition Units Min. Typ Max. G Gain dB 17 19.3 – NF Noise Figure dB – 1.62 2.0 IP1dB Input 1dB Compressed Power dBm – -8 – IIP3[2] Input 3rd Order Intercept Point (2-tone @ Fc +/- 2.5MHz) dBm – +1.5 – S11 Input Return Loss dB – -9.5 – S22 Output Return Loss dB – -13.5 – S12 Reverse Isolation dB – -29 – Cell Band Rejection Worst-case relative to 1.575GHz within (827-928)MHz band dBc 51 57 – PCS Band Rejection Worst-case relative to 1.575GHz within (1710-1980)MHz band dBc 45 53 – WLAN Band Rejection Worst-case relative to 1.575GHz within (2400-2500)MHz band dBc 43 52 – IP1dB928MHz Input 1dB gain compression interferer signal level at 928MHz dBm – +39 – IP1dB1980MHz Input 1dB gain compression interferer signal level at 1980MHz dBm – +44 – IP1dB2400MHz Input 1dB gain compression interferer signal level at 2400MHz dBm – +43 – Idd Supply DC current at Shutdown (SD) voltage Vsd=2.7V mA – 6 11.5 Ish Shutdown Current @ VSD = 0V uA – 0.5 – Table 2. Performance at Vdd = Vsd = 1.8V, Idd = 4mA & Vdd = Vsd = 2.8V, Idd = 4mA (for R2 value, see Fig 7) nominal operating conditions Vdd=1.8V Vdd=2.8V Symbol Parameter and Test Condition Units Idd=4mA Idd=4mA G Gain dB 17.5 18 NF Noise Figure dB 1.68 1.65 IP1dB Input 1dB Compressed Power dBm -9.6 -9.5 IIP3[2] Input 3rd Order Intercept Point (2-tone @ Fc +/- 2.5MHz) dBm 0 +1.0 S11 Input Return Loss dB -8 -8.5 S22 Output Return Loss dB -10 -10 S12 Reverse Isolation dB -27 -27 Cell Band Rejection Worst-case relative to 1.575GHz within (827-928)MHz band dBc 56 55 PCS Band Rejection Worst-case relative to 1.575GHz within (1710-1980)MHz band dBc 52 51 WLAN Band Rejection Worst-case relative to 1.575GHz within (2400-2500)MHz band dBc 51 50 IP1dB928MHz Input 1dB gain compression interferer signal level at 928MHz dBm +38 +38 IP1dB1980MHz Input 1dB gain compression interferer signal level at 1980MHz dBm +38 +38 IP1dB2400MHz Input 1dB gain compression interferer signal level at 2400MHz dBm +39 +39 Idd Supply DC current at Shutdown (SD) voltage Vsd=1.8V mA 4 4 Ish Shutdown Current @ VSD = 0V uA 0.5 0.5 Notes: 1. Measurements at 1.575GHz obtained using schematic described in Figure 7 & 8 below. 2. 1.575GHz IIP3 test condition: FRF1 = 1572.5 MHz, FRF2 = 1577.5 MHz with input power of -30dBm per tone measured at the worst case side band 3 1 2 3 4 D D D D N D N S G V G INCH H0.010 W0.022 R1 e3.48 L1 C1 C3 C2 R2 RF Input RF Output L2 RFIN RFOUT RDV02 MAY 2009 Avago Technologies DC Pin Configuration of 4-Pins connector Pins 2, 4 = GND 1 2 3 4 Pin 3 = Vdd Supply Pin 1 = Shutdown (SD) Circuit Symbol Size Description Part Number L1 0402 22nH Inductor (Taiyo Yuden HK100522NJ-T) L2 0402 1.8nH Inductor (Taiyo Yuden HK10051N8S-T) C1 0402 0.1uF Capacitor (Kyocera CM05X5R104K10AH) C2 0402 47pF Capacitor (Kyocera CM05CH470J50AHF) C3 0402 330pF Capacitor (Kyocera CM05CH331J16AHF) R1 0402 10 Ohm (KOA RK73B1ETTB100J) R2 0402 4.7 kOhm (KOA RK73B1ETTB472J) Figure 2. Demoboard and application circuit components table 4 Vdd (Pin 7) R1 L1 C2 C1 L2 Vdd GPS 50-Ohms TL Filter LNA 50-Ohms TL RFin (Pin 1) RFout (Pin 6) Vsd (Pin 2, 3, 4, 5, 9) R2 Vsd (Pin 8) C3 Figure 3. Demoboard and application schematic diagram Notes • The module is fully matched at the input and output RF pins. Both these pins also have built-in coupling and DC-blocking capacitors. Best noise performance is obtained using high-Q wirewound inductors. This circuit demonstrates that low noise figures are obtainable with standard 0402 chip inductors. • C2 and L2 form a matching network that affects the frequency response and linearity of the LNA, these can be tuned to optimize gain and return loss. • L1 and R1 isolates the demoboard from external disturbances during measurement. It is not needed in actual application. Likewise, C1 and C3 mitigate the effect of external noise pickup on the Vdd and Vsd lines respectively. These components are not required in actual operation. • Bias control is achieved by either varying the Vsd voltage with/without R2, or fixing the Vsd voltage to Vdd and adjusting R2 for the desired current. R2 = 4.7Kohm will result 6mA when Vdd = Vsd = 2.7V. R2 = 2.7Kohm for 4mA when Vdd = Vsd = 1.8V & R2 = 15Kohm for 4mA when Vdd = Vsd = 2.8V. 5 ALM-1912 Typical Performance Curves at 25° 20 5 20 10 10 10 5 0 0 0 0 -10 Gain(dB) ---432000 --150Return Loss Gain(dB) --2100 --150Return Loss -50 -30 -15 -60 -15 Gain -40 Gain -20 -70 Input Return Loss Input Return Loss Output Return Loss Output Return Loss -80 -20 -50 -25 0.5 1 1.5 2 2.5 3 3.5 4 1.5 1.52 1.54 1.56 1.58 1.6 1.62 1.64 Freq(GHz) Freq(GHz) Figure 3a. Typical S-Parameter Plot @ Vdd = 2.7V, Idd = 6mA Figure 3b. Passband response of typical S-Parameter Plot @ Vdd = 2.7V, Idd = 6mA 20 5 20 10 10 10 5 0 0 0 -10 0 Gain(dB)----54320000 --150Return Loss Gain(dB) ---321000 ---11550Return Loss -20 -60 -15 Gain Gain -70 Input Return Loss -40 Input Return Loss -25 Output Return Loss Output Return Loss -80 -20 -50 -30 0.5 1 1.5 2 2.5 3 3.5 4 1.5 1.52 1.54 1.56 1.58 1.6 1.62 1.64 Freq(GHz) Freq(GHz) Figure 4a. Typical S-Parameter Plot @ Vdd = 1.8V, Idd = 4mA Figure 4b. Passband response of typical S-Parameter Plot @ Vdd = 1.8V, Idd = 4mA 6 ALM-1912 Typical Performance Curves at 25° C, R2 = 4.7kOhm 16 8 Vdd=2.7V 7 Vdd=1.8V 12 6 5 A) A) d (m 8 d (m 4 d d I I 3 4 2 1 0 0 0 5 10 15 20 25 30 35 40 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Rbias (kohm) Vsd (V) Figure 5. Idd vs Rbias at 25°C Figure 6. Idd vs Vsd for Vdd = 2.7V, R2 = 4.7k Ohm 8 2.4 7 2.2 6 25C 2 5 85C A) B) -40C d (m 4 NF (d 1.8 d I 3 1.6 2 1.4 1 0 1.2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 2 3 4 5 6 7 8 9 10 11 12 Vsd (V) Idd (mA) Figure 7. Idd vs Vsd for Vdd = 1.8V, R2 = 2.7k Ohm Figure 8. NF vs. Idd at Vdd = 2.7V 2.6 21 25C 25C 2.4 85C 85C 20 -40C -40C 2.2 B) 2 dB)19 NF (d 1.8 Gain (18 1.6 17 1.4 1.2 16 2 3 4 5 6 7 8 2 3 4 5 6 7 8 9 10 11 Idd (mA) Idd (mA) Figure 9. NF vs Idd at Vdd = 1.8V Figure 10. Gain vs. Idd at Vdd = 2.7V 7 ALM-1912 Typical Performance Curves at 25° C, R2 = 4.7kOhm 20 64 25C 25C 19 85C 85C 18 -40C Bc) -40C d Gain (dB) 1167 Rejection (62 15 nd a60 B 14 ell C 13 12 58 2 3 4 5 6 7 8 9 10 11 2 3 4 5 6 7 8 9 10 11 Idd (mA) Idd (mA) Figure 11. Gain vs. Idd at Vdd = 1.8V Figure 12. Cell band rejection vs. Idd at Vdd = 2.7V 64 58 25C 25C 85C 85C -40C -40C on (dBc)62 n (dBc)56 Rejecti60 ejectio nd d R a n54 B a ell 58 S B C C P 56 52 2 3 4 5 6 7 8 9 10 11 2 3 4 5 6 7 8 9 10 11 Idd (mA) Idd (mA) Figure 13. Cell band rejection vs. Idd at Vdd = 1.8V Figure 14. PCS band rejection vs. Idd at Vdd = 2.7V 56 58 25C 25C 85C 85C -40C -40C Bc) Bc) n (d n (d56 o o ejecti54 ejecti R R d d n n a a54 B B S N PC LA W 52 52 2 3 4 5 6 7 8 9 10 11 2 3 4 5 6 7 8 9 10 11 Idd (mA) Idd (mA) Figure 15. PCS band rejection vs. Idd at Vdd = 1.8V Figure 16. WLAN band rejection vs. Idd at Vdd = 2.7V 8 ALM-1912 Typical Performance Curves at 25° C, R2 = 4.7kOhm 58 25C 85C Bc) -40C d on (56 ecti ej R d n a B54 N A L W 52 2 3 4 5 6 7 8 9 10 11 Idd (mA) Figure 17. WLAN band rejection vs. Idd at Vdd = 1.8V Figure 18. IP1dB vs. Vdd at 25°C 40 m) B39 d n ( o essi38 pr m o37 C n ai d G36 n a B of 35 2.7V (6mA) ut 1.8V (4mA) O 34 -40 -20 0 20 40 60 80 Temperature (°C) Figure 19. IIP3 vs. Vdd at 25°C Figure 20. Input signal required at 928MHz interference signal to cause 1dB gain compression at 1.575GHz 45 45 mpression (dBm)444234 21..78VV ((64mmAA)) mpression (dBm) 4444401234 Out of Band Gain Co33448901 Out of Band Gain Co 3333356789 21..78VV ((64mmAA)) 37 34 -40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 Temperature (°C) Temperature (°C) Figure 21. Input signal required at 1980MHz interference signal to cause 1dB Figure 22. Input signal required at 2400MHz interference signal to cause 1dB gain compression at 1.575GHz gain compression at 1.575GHz 9 ALM-1912 Typical Performance Curves at 25° C, R2 = 4.7kOhm 2.0 2.0 1.8 1.8 1.6 1.6 1.4 1.4 1.2 1.2 Stability_n40C..Mu1 Stability_n40C..MuPrime1 1.0 Stability_85C..Mu1 1.0 Stability_85C..MuPrime1 Stability_25C..Mu1 Stability_25C..MuPrime1 0.8 0.8 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 freq, GHz freq, GHz Figure 23. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 2.7V Figure 24. Edwards-Sinsky Input Stability Factor (Mu’) at Vdd = 2.7V 2.0 2.0 1.8 1.8 1.6 1.6 1.4 1.4 1.2 1.2 Stability_n40C..Mu1 Stability_n40C..MuPrime1 1.0 Stability_85C..Mu1 1.0 Stability_85C..MuPrime1 Stability_25C..Mu1 Stability_25C..MuPrime1 0.8 0.8 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 freq, GHz freq, GHz Figure 25. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 1.8V Figure 26. Edwards-Sinsky Input Stability Factor (Mu’) at Vdd = 1.8V 10