Product Order Technical Tools & Support & Folder Now Documents Software Community TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 TAS2557 5.7-W Class-D mono audio amplifier with class-H boost and speaker sense 1 Features 3 Description The TAS2557 device is a state-of-the-art Class-D • Ultralow-noisemonoboostedclass-Damplifier 1 audio amplifier which is a full system on a Chip – 5.7Wat1%THD+Nand6.9Wat10% (SoC). The device features a ultra low-noise audio THD+Ninto4-Ωloadfrom4.2-Vsupply DAC and Class-D power amplifier which incorporates – 3.8Wat1%THD+Nand4.5Wat10% speaker voltage and current sensing feedback. An THD+Ninto8-Ωloadfrom4.2-Vsupply on-chip, low-latency DSP supports Texas Instruments SmartAmp speaker protection algorithms to • Output noiseforDAC+class-D(ICN)is15.9 µV maximizes loudness while maintaining safe speaker • DAC+class-DSNR111dBat1%THD+N/8 Ω conditions. • THD+N –90dBat1W/8 Ω withflatfrequency The device can be used easily with any processor response with an I2S output and stereo implementations are • Post-filterfeedback(PFFB) possible when using two TAS2557 devices. Separate • PSRR110dBfor200mV rippleat217Hz tuning for different speakers is supported allowing pp customers to add value while maintaining form factor • Inputsampleratesfrom8kHzto96kHz designs. Additionally, the TAS2557 supports separate • Built-inspeakersense voiceandaudiotuningdynamicallywithultra-low15.9 – Measuresspeakercurrentandvoltage µV ICN regardless of mode of operation making receiver/speakerimplementationspossible. – MeasuresVBATvoltage,chiptemperature • Dedicatedreal-time dual-coreDSPforspeaker A Class-H boost converter generates the Class-D protection amplifier supply rail. When the audio signal only requires a lower Class-D output power, the boost – Thermalandexcursionprotection improves system efficiency by deactivating and – Detectsspeakerleaksanddamage connecting V directly to the Class-D amplifier BAT • Highefficiencyclass-H boostconverterwithmulti- supply. When higher audio output power is required, leveltracking the multi-level boost quickly activates tracking the signaltoprovidetheadditionalvoltagetotheload. – 86%at500mWin8 Ωwith3.6VV BAT – 87%at700mWin8 Ωwith4.2VVBAT DeviceInformation(1) • Configurableautomaticgaincontrol(AGC) PARTNUMBER PACKAGE BODYSIZE(NOM) – Limitsbatterycurrentconsumption TAS2557 DSBGA(42) 3.47mm×3.23mm • Adjustableclass-Dswitchingedge-ratecontrol (1) For all available packages, see the orderable addendum at • Thermal, short-circuit,andunder-voltage theendofthedatasheet. protection SimplifiedSchematic • I2S, Left-justified,right-justified,DSP,andTDM inputandoutputinterface, L1 • I2CorSPIinterfaceforregistercontrol VBAT 2SW • StereoconfigurationusingtwoTAS2557devices C1 VREG • Powersupplies VBOOST – Boostinput:2.9Vto5.5V 2 – Analog/digital:1.65Vto1.95V C2 Ferrite bead MCLK – DigitalI/O:1.62Vto3.6V (optional) OUT+ + • 42-ball, 0.5-mmpitch,DSBGApackage I2S TAS2557 To Speaker OUT- - 4 Ferrite bead 2 Applications I2C (optional) • Mobilephonesandtablets VSENSE+ 2 • Videodoorbellsandvoiceenabledthermostats /RESET VSENSE- • Personalcomputers • Bluetoothspeakersandaccessories 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA. TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 www.ti.com Table of Contents 1 Features.................................................................. 1 9.3 FeatureDescription.................................................18 2 Applications........................................................... 1 9.4 DeviceFunctionalModes........................................29 3 Description............................................................. 1 9.5 Programming...........................................................36 9.6 RegisterMap...........................................................39 4 RevisionHistory..................................................... 2 10 ApplicationandImplementation........................ 96 5 DeviceComparisonTable..................................... 3 10.1 ApplicationInformation..........................................96 6 PinConfigurationandFunctions......................... 4 10.2 TypicalApplication................................................96 7 Specifications......................................................... 6 10.3 InitializationSetup.................................................98 7.1 AbsoluteMaximumRatings......................................6 11 PowerSupplyRecommendations..................... 99 7.2 ESDRatings..............................................................6 11.1 PowerSupplies.....................................................99 7.3 RecommendedOperatingConditions.......................6 11.2 PowerSupplySequencing....................................99 7.4 ThermalInformation..................................................6 12 Layout................................................................. 100 7.5 ElectricalCharacteristics...........................................7 7.6 I2CTimingRequirements.........................................9 12.1 LayoutGuidelines...............................................100 12.2 LayoutExample..................................................101 7.7 SPITimingRequirements ........................................9 7.8 I2S/LJF/RJFTimingRequirements(MasterMode) 10 13 DeviceandDocumentationSupport............... 102 7.9 I2S/LJF/RJFTimingRequirements(SlaveMode)..10 13.1 DocumentationSupport .....................................102 7.10 DSPTimingRequirements(MasterMode) ..........11 13.2 CommunityResources........................................102 7.11 DSPTimingRequirements(SlaveMode) ............11 13.3 Trademarks.........................................................102 7.12 TypicalCharacteristics..........................................14 13.4 ElectrostaticDischargeCaution..........................102 13.5 Glossary..............................................................102 8 ParameterMeasurementInformation................16 14 Mechanical,Packaging,andOrderable 9 DetailedDescription............................................ 17 Information......................................................... 102 9.1 Overview.................................................................17 14.1 PackageDimensions..........................................102 9.2 FunctionalBlockDiagram.......................................18 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionA(February2017)toRevisionB Page • AddedBoost,Switching,RegulatorvoltageandNote2totheAbsoluteMaximumRatingstable........................................ 6 • ChangedC2Capacitanceat8.5VderatingMINvalueFrom:7μFTo:3.3μFinTable128.............................................. 97 ChangesfromOriginal(November2016)toRevisionA Page • ChangedESDHBMratingfrom±2500to±3500 .................................................................................................................. 6 • ChangedPowerConsumptionvalues.................................................................................................................................... 8 • Fixedincorrectpartnumber.................................................................................................................................................. 30 2 SubmitDocumentationFeedback Copyright©2016–2019,TexasInstrumentsIncorporated ProductFolderLinks:TAS2557 TAS2557 www.ti.com SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 5 Device Comparison Table SMARTAMP PARTNUMBER CONTROL BOOST SNR (1) ICN THD+N BOOST DIGITAL METHOD VOLTAGE CONTROL ENGINE NO(External TAS2552 I2C 8.5V 94dB 130µV -64dB Class-G Processing Required) NO(External TAS2553 I2C 7.5V 94dB 130µV -64dB Class-G Processing Required) TAS2555 I2CorSPI 8.5V 111dB 15.9µV -90dB Class-H YES(Processing onChip) TAS2557 I2CorSPI 8.5V 111dB 15.9µV -90dB Class-H YES(Processing onChip) TAS2559 I2CorSPI 8.5V 111dB 15.9µV -90dB Class-H YES(Processing onChip) NO(External TAS2560 I2C 8.5V 111dB 16.2µV -88dB Class-H Processing Required) (1) A-weighteddata. Copyright©2016–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TAS2557 TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 www.ti.com 6 Pin Configuration and Functions 42-BallDSBGA YZPackage (TopView) 1 2 3 4 5 6 WCLK1 DOUT1 A PGND_B PGND_B VBAT ICC_GPIO9 _GPIO2 _GPIO3 BCLK1 B SW SW ICC_GPIO10 ICC_GPI3 DIN1_GPI1 _GPIO1 C VBOOST VBOOST IN_P,NC4 DGND DIN2_GPIO8 DVDD D SPK_M VREG NC3 IOGND IRQ_GPIO4 MCLK_GPI2 WCLK2 DOUT2 E PGND VSENSE_P AGND SDA_MOSI _GPIO6 _GPIO7 BCLK2 F SPK_P VSENSE_M SCL_SSZ AVDD ADR0_SCLK _GPIO5 G NC2 NC1 ADR1_MISO SPI_SELECT RESET IOVDD Not to scale PinFunctions PIN TYPE DESCRIPTION BALLNO. NAME A1,A2 PGND_B P Powerground-connecttohighcurrentgroundplane. A3 VBAT P Batterypowersupply-connectto2.9Vto5.5Vbatterysupply. A4 ICC_GPIO9 I/O Stereointer-chipcommunicationclockorGPIOpin. A5 WCLK1_GPIO2 I/O AudiowordclockonASI#1orGPIOpin. A6 DOUT1_GPIO3 I/O AudiodataoutputonASI#1orGPIOpin. B1,B2 SW P Boostconverterswitchinput. B3 ICC_GPIO10 I/O Stereointer-chipcommunicationdataoutputorGPIOpin. B4 ICC_GPI3 I Stereointer-chipcommunicationdatainputorGPIpin. B5 DIN1_GPI1 I AudiodatainputtoASI#1orGPIpin. B6 BCLK1_GPIO1 I/O AudiobitclockonASI#1orGPIOpin. C1,C2 VBOOST P Boostconverteroutput. C3 NC4 - Floatconnection-donotrouteanysignalorsupplytoorthroughthispin. C4 DGND P Digitalgroundpin. C5 DIN2_GPIO8 I/O AudiodatainputtoASI#2orGPIOpin. C6 DVDD P 1.8Vdigitalpowersupplyfordigitalcorelogic. 4 SubmitDocumentationFeedback Copyright©2016–2019,TexasInstrumentsIncorporated ProductFolderLinks:TAS2557 TAS2557 www.ti.com SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 PinFunctions (continued) PIN TYPE DESCRIPTION BALLNO. NAME D1 SPK_M O InvertingClass-Doutput. D2 VREG P Regulatoroutput. D3 NC3 - Floatconnection-donotrouteanysignalorsupplytoorthroughthispin. D4 IOGND P Digitalinterfacegroundpin. D5 IRQ_GPIO4 I/O Active-highinterruptpinorGPIOpin D6 MCLK_GPI2 I MasterclockinputorGPIpin. E1 PGND P Powerground-connecttohighcurrentgroundplane. E2 VSENSE_P I Non-invertingvoltagesenseinput. E3 AGND P Analogground-connecttolownoisegroundplane. E4 SDA_MOSI I/O Multi-functiondigitalpinfor(SPI_SELECT=0):DataPinforI2Ccontrolbus.For(SPI_SELECT= 1):SPIdatainput. E5 WCLK2_GPIO6 I/O Audioword-clockonASI#2orGPIOpin. E6 DOUT2_GPIO7 I/O AudiodataoutputonASI#2orGPIOpin. F1 SPK_P O Non-invertingClass-Doutput. F2 VSENSE_M I Invertingvoltagesenseinput. F3 SCL_SSZ I Multi-functiondigitalinput.For(SPI_SELECT=0):ClockPinforI2CControlbus.For (SPI_SELECT=1):SPIchipselectionpin. F4 AVDD P 1.8Vanalogpowersupply. F5 ADR0_SCLK I Multi-functiondigitalpin.For(SPI_SELECT=0):DeviceI2CprogrammingaddressLSB.For (SPI_SELECT=1):SPIserialbitclock. F6 BCLK2_GPIO5 I/O AudiobitclockonASI#2orGPIOpin. G1 NC2 - Floatconnection-donotrouteanysignalorsupplytoorthroughthispin. G2 NC1 - Floatconnection-donotrouteanysignalorsupplytoorthroughthispin. G3 ADR1_MISO I/O Multi-functiondigitalinput/output.For(SPI_SELECT=0):DeviceI2Cprogrammingaddress MSB.For(SPI_SELECT=1):SPIdataoutput G4 SPI_SELECT I Controlinterfaceselect.0:I2Cselected.1:SPIselected. G5 RESET I Active-lowreset. G6 IOVDD P 1.8Vor3.3Vdigitalinterfacepowersupplyfordigitalinputandoutputlevels. Copyright©2016–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TAS2557 TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings Overoperatingfree-airtemperaturerange,T =25°C(unlessotherwisenoted)(1) A MIN MAX UNIT BatteryVoltage VBAT –0.3 6 V AnalogSupplyVoltage AVDD –0.3 2 V DigitalSupplyVoltage DVDD –0.3 2 V I/OSupplyVoltage IOVDD –0.3 3.9 V Boost VBST –0.3 9.2 V Switching SW –0.7 VBST+1.5(2) V Regulatorvoltage VREG –0.3 VBST+5 V DigitalInputVoltage –0.3 IOVDD+0.3 V OutputContinuousTotalPowerDissipation SeeThermalInformation NA StorageTemperature,Tstg –65 150 °C (1) Stressesbeyondthoselistedunder“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Proceduresisnotimplied.Exposuretoabsolute–maximum–ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Cannotexceed11Vforgreaterthan10nSor10Vcontinuously. 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±3500 V(ESD) ElectrostaticDischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 V (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions Overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT BatteryVoltage VBAT 2.9(1) 3.6 5.5 V AnalogSupplyVoltage AVDD 1.65 1.8 1.95 V DigitalSupplyVoltage DVDD 1.65 1.8 1.95 V I/OSupplyVoltage1.8V IOVDD 1.62 1.8 1.98 V I/OSupplyVoltage3.3V IOVDD 3.0 3.3 3.6 V TA OperatingFree-AirTemperature –40 85 °C TJ OperatingJunctionTemperature –40 150 °C (1) Deviceisfunctionaldownto2.7V.SeeBatteryTrackingAGC 7.4 Thermal Information TAS2557 THERMALMETRIC(1) YZ(DSBGA) UNIT 42PINS RθJA JunctiontoAmbientThermalResistance 49.8 RθJC(top) JunctiontoCase(top)ThermalResistance 0.2 RθJB JunctiontoBoardThermalResistance 7.1 °C/W ψJT JunctiontoTopCharacterizationParameter 0.8 ψJB JunctiontoBoardCharacterizationParameter 7.1 RθJC(bot) JunctiontoCase(bottom)ThermalResistance n/a (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 6 SubmitDocumentationFeedback Copyright©2016–2019,TexasInstrumentsIncorporated ProductFolderLinks:TAS2557 TAS2557 www.ti.com SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 7.5 Electrical Characteristics V =3.6V,AVDD=DVDD=IOVDD=1.8V,RESET=IOVDD,Gain=16.4dB,ERC=14ns,BoostInductor=2.2µH,R = BAT L 8Ω+33µH,1-kHzinputfrequency,48-kHzsampleratefordigitalinput,Class-HBoostEnabled,T =25°C,ILIM=3A A (unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT BOOSTCONVERTER BoostOutputVoltage Averagevoltage(w/oincludingripple) 8.5 V BoostConverterSwitchingFrequency 1.77 MHz BoostConverterCurrentLimit 3 A HighEfficiencyMode:Maxinductorinrush 4 andstartupcurrentafterenable BoostConverterMaxIn-RushCurrent A NormalEfficiencyMode:Maxinductor 1.5 inrushandstartupcurrentafterenable CLASS-DCHANNEL OutputVoltageforFull-ScaleDigital 6.6 V Input RMS LoadResistance(LoadSpec 3.6 8 Ω Resistance) AvgFrequencyinSpread-SpectrumMode 384 Class-DFrequency kHz FixedFrequency 44.1×8 48×8 P =3.5W(sinewave)ROMMode1 80 OUT Class-D+BoostEfficiency % P =0.5W(sinewave)ROMMode1 87 OUT Class-DOutputCurrentLimit(Short VBOOST=8.5V,OUT–shortedtoVBAT, 6 A CircuitProtection) VBOOST,GND Class-DOutputOffsetVoltagein –2.5 2.5 mV DigitalInputMode ProgrammableChannelGain ±0.5 dB Accuracy Deviceinshutdownordeviceinnormal MuteAttenuation 150 dB operationandmuted VBATPowerSupplyRejectionRatio Rippleof200mVppat217Hz 110 dB (PSRR) AVDDPowerSupplyRejectionRatio Rippleof200mVppat217Hz 99 dB (PSRR) 1kHz,P =0.1W 0.0041 OUT 1kHz,Po=0.5W 0.0036 THD+N % 1kHz,Po=1W 0.0035 1kHz,Po=3W 0.02 OutputIntegratedNoise(20Hz-20kHz) A-weightedfilter,DACmodulator 15.9 µV -8Ω switching Referencedto1%THD+Natoutput,A- Signal-to-NoiseRatio 110.6 dB weighted THD+N=1%,8-ΩLoad 3.7 MaxOutputPower,3-ACurrentLimit THD+N=1%,6-ΩLoad 4.5 W THD+N=1%,4-ΩLoad 5 StartupPop DigitalInput,A-weightedoutput 10 mV OutputImpedanceinShutdown /RESET=0V 10 kΩ Timetakenfromendofconfiguringdevice inROMmode1/2tospeakeroutputsignal StartupTime 8 mS inSPImoderunningat25MHzwith48 kspsinput Measuredfromtimewhendeviceis ShutdownTime 100 µS programmedinsoftwareshutdownmode Copyright©2016–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TAS2557 TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 www.ti.com Electrical Characteristics (continued) V =3.6V,AVDD=DVDD=IOVDD=1.8V,RESET=IOVDD,Gain=16.4dB,ERC=14ns,BoostInductor=2.2µH,R = BAT L 8Ω+33µH,1-kHzinputfrequency,48-kHzsampleratefordigitalinput,Class-HBoostEnabled,T =25°C,ILIM=3A A (unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT CURRENTSENSE Peakcurrentwhichwillgivefullscale 1.25 digitaloutput8-Ωload Peakcurrentwhichwillgivefullscale CurrentSenseFullScale 1.48 A digitaloutput6-Ωload PEAK Peakcurrentwhichwillgivefullscale 1.76 digitaloutput4-Ωload CurrentSenseAccuracy I =354mA (1W) 1 % OUT RMS VOLTAGESENSE Peakvoltagewhichwillgivefullscale VoltageSenseFullScale 9.353 V digitaloutput PEAK VoltageSenseAccuracy V =2.83Vrms(1W) 1 % OUT INTERFACE VoltageandCurrentSenseDataRate TDM/I2S 48 kHz VoltageandCurrentSenseADCOSR TDM/I2S 64 OSR F MCLKfrequency 0.512 49.15 MHz MCLK POWERCONSUMPTION FromVBAT,PLLon,nosignal 3 mA PowerConsumptionwithDigitalInput andSpeakerProtectionDisabled FromAVDD,PLLon,nosignal 3 mA (ROMMODE1) FromDVDD,PLLon,nosignal 7.2 mA FromVBAT,PLLon,nosignal 4 mA PowerConsumptionwithDigitalInput FromAVDD,PLLon,nosignal 5.1 mA andSpeakerProtectionEnabled FromDVDD,PLLon,nosignal 22 mA FromVBAT,/RESET=0 0.1 µA PowerConsumptioninHardware FromAVDD,/RESET=0 0.2 µA Shutdown FromDVDD,/RESET=0 2 µA FromVBAT 0.1 µA PowerConsumptioninSoftware FromAVDD 0.1 µA ShutdownSeeLowPowerSleep FromDVDD 9.7 µA DIGITALINPUT/OUTPUT 0.65× V High-LevelDigitalInputVoltage V IH AlldigitalpinsexceptSDAandSCL, IOVDD IOVDD=1.8-Voperation 0.35× V Low-LevelDigitalinputVoltage V IL IOVDD VIH High-LevelDigitalInputVoltage AlldigitalpinsexceptSDAandSCL, 2 V V Low-LevelDdigitalInputVoltage IOVDD=3.3-Voperation 0.45 V IL V High-LevelDigitalOutputVoltage AlldigitalpinsexceptSDAandSCL, IOVDD– V OH IOVDD=1.8-VoperationForI =2mA 0.45 OL VOL Low-LevelDigitalOutputVvoltage andIOH=–2mA 0.45 V V High-LevelDigitalOutputVoltage AlldigitalpinsexceptSDAandSCL, 2.4 V OH IOVDD=3.3-VoperationForI =2mA OL VOL Low-LevelDigitalOutputVoltage andIOH=–2mA 0.4 V High-LevelDigitalInputLeakage I Input=IOVDD –5 0.1 5 µA IH Current Low-LevelDigitalInputLeakage I Input=Ground –5 0.1 5 µA IL Current MISCELLANEOUS T ThermalTripPoint 140 °C TRIP 8 SubmitDocumentationFeedback Copyright©2016–2019,TexasInstrumentsIncorporated ProductFolderLinks:TAS2557 TAS2557 www.ti.com SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 7.6 I2C Timing Requirements ForI2Cinterfacesignalsoverrecommendedoperatingconditions(unlessotherwisenoted).SeeFigure1(1) STANDARD- FAST-MODE PARAMETER MODE UNIT MIN MAX MIN MAX f SCLClockFrequency 0 100 0 400 kHz SCL t HoldTime(repeated)STARTCondition.Afterthisperiod,thefirstclock 4 0.6 μs HD;STA pulseisgenerated. t LOWPeriodoftheSCLClock 4.7 1.3 μs LOW t HIGHPeriodoftheSCLClock 4 0.6 μs HIGH t SetupTimeforaRepeatedSTARTCondition 4.7 0.6 μs SU;STA t DataHoldTime:ForI2CBusDevices 0 3.45 0 0.9 μs HD;DAT t DataSetupTime 250 100 ns SU;DAT t SDAandSCLRiseTime 1000 20+ 300 ns r 0.1× Cb t SDAandSCLFallTime 300 20+ 300 ns f 0.1× Cb t SetupTimeforSTOPCondition 4 0.6 μs SU;STO t BusFreeTimeBetweenaSTOPandSTARTCondition 4.7 1.3 μs BUF C CapacitiveLoadforEachBusLine 400 400 pF b (1) Alltimingspecificationsaremeasuredatcharacterizationbutnottestedatfinaltest. 7.7 SPI Timing Requirements ForSPIinterfacesignalsoverrecommendedoperatingconditions(unlessotherwisenoted).SeeFigure2(1) IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX tsck SCLKPeriod 40 30 ns tsckh SCLKPulseWidthHigh 40 30 ns tsckl SCLKPulseWidthLow 40 30 ns tlead EnableLeadTime 40 30 ns ttrail EnableTrailTime 40 30 ns td;seqxfr SequentialTransferDelay 40 30 ns ta SlaveDOUTAccessTime 35 25 ns tdis SlaveDOUTDisableTime 35 25 ns tsu DINDataSetupTime 8 8 ns th;DIN DINDataHoldTime 8 8 ns tv;DOUT DOUTDataValidTime 35 25 ns tr SCLKRiseTime 4 4 ns tf SCLKFallTime 4 4 ns (1) Alltimingspecificationsaremeasuredatcharacterizationbutnottestedatfinaltest. Copyright©2016–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TAS2557 TAS2557 SLASEC2B–NOVEMBER2016–REVISEDFEBRUARY2019 www.ti.com 7.8 I2S/LJF/RJF Timing Requirements (Master Mode) AllspecificationsatT =–40°Cto85°C,IOVDDdatasheetlimits,V andV applied,V andV measuredatdatasheet A IL IH OL OH limits,lumpedcapacitiveloadof20pFonoutputpinsunlessotherwisenoted.SeeFigure3(1) IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX 50%ofBCLKto50%of td(WS) BCLKtoWCLKdelay WCLK 35 25 ns 50%ofWCLKto50%of td(DO-WS) WCLKtoDOUTDelay(ForLJFModeOnly) DOUT 35 25 ns td(DO- BCLKtoDOUTDelay 50%ofBCLKto50%of 35 25 ns BCLK) DOUT ts(DI) DINSetup 8 8 ns th(DI) DINHold 8 8 ns tr RiseTime 10%-90%RiseTime 8 4 ns tf FallTime 90%-10%FallTime 8 4 ns (1) Alltimingspecificationsaremeasuredatcharacterizationbutnottestedatfinaltest. 7.9 I2S/LJF/RJF Timing Requirements (Slave Mode) AllspecificationsatT =–40°Cto85°C,IOVDDdatasheetlimits,V andV applied,V andV measuredatdatasheet A IL IH OL OH limits,lumpedcapacitiveloadof20pFonoutputpinsunlessotherwisenoted.SeeFigure4(1) IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX tH(BCLK) BCLKHighPeriod 40 30 ns tL(BCLK) BCLKLowPeriod 40 30 ns ts(WS) (WS) 8 8 ns th(WS) WCLKHold 8 8 ns 50%ofWCLKto50%of td(DO-WS) WCLKtoDOUTDelay(ForLJFModeOnly) DOUT 35 25 ns 50%ofBCLKto50%of td(DO-BCLK) BCLKtoDOUTDelay DOUT 35 25 ns ts(DI) DINSetup 8 8 ns th(DI) DINHold 8 8 ns tr RiseTime 10%-90%RiseTime 8 4 ns tf FallTime 90%-10%FallTime 8 4 ns (1) Alltimingspecificationsaremeasuredatcharacterizationbutnottestedatfinaltest. 10 SubmitDocumentationFeedback Copyright©2016–2019,TexasInstrumentsIncorporated ProductFolderLinks:TAS2557